co661al-l Connect One Ltd., co661al-l Datasheet
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co661al-l Summary of contents
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... LAN iChip LAN CO661AL-L Datasheet Pub. No. 11-3800-01, ©Copyright February 2003 TM Ver. 1.02 International: Connect One Ltd. 2 Hanagar Street Kfar Saba 44425, Israel Tel: +972-9-766-0456 Fax: +972-9-766-0461 E-mail: info@connectone.com http://www.connectone.com USA: Connect One Semiconductors, Inc. 15818 North 9th Ave. ...
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... Connect One. iChip, iChip LAN, iChip Plus, Socket iChip, Embedded iModem, Internet Controller, iConnector, iLAN, iModem, Instant Internet, AT+i, and Connect One are trademarks of Connect One Ltd. Copyright 2000 - 2003 Connect One Ltd. All rights reserved. iChip LAN CO661AL-L Datasheet ii ...
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... Revision History 11-3800-01 Version Date 1.00 December 2002 1.01 January 2003 1.02 February 2003 iChip LAN CO661AL-L Datasheet Description Original Release for iChip LAN CO661AL-L Internal Editing Change POBE pin description iii ...
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... Introduction ............................................................................................................. 1-1 2 Ordering Information ............................................................................................. 2-1 2.1 iChip LAN CO661AL-L Order Number ..................................................... 2-1 3 Functional Description............................................................................................ 3-1 3.1 Overview...................................................................................................... 3-1 3.2 Technical Specifications .............................................................................. 3-1 3.2.1 General......................................................................................................... 3-1 3.2.2 Operation...................................................................................................... 3-1 3.2.3 Remote Internet Firmware Update............................................................... 3-2 3.2.4 Local BUS connection to an Ethernet LAN controller................................ 3-2 3.2.5 Host Connection........................................................................................... 3-2 3.2.6 Hardware and Software Flow Control ......................................................... 3-3 4 Hardware Interface................................................................................................. 4-1 4.1 Serial Host Interface .................................................................................... 4-1 4.2 Parallel Host Interface 4 ...
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... LAN Designs.................................................................................................. 7-1 7.1 Serial Host and Ethernet Controller Environment ....................................... 7-1 7.2 Parallel Host and Ethernet Controller Environment .................................... 7-1 7.3 Selecting a Crystal ....................................................................................... 7-2 7.4 Selecting the Reset Circuit........................................................................... 7-3 7.4.1 RC Network ................................................................................................. 7-3 7.4.2 Supervisory Circuit ...................................................................................... 7-3 1 7.5 Sleep Mode ................................................................................................ 7-4 8 Protocol Compliance ............................................................................................... 8-1 9 List of Terms and Acronyms.................................................................................. 9-1 iChip LAN CO661AL-L Datasheet Contents v ...
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... Figure 1-1 iChip LAN Functional Block Diagram.......................................................... 1-2 Figure 4-1 Interface to an 80x86 Type BUS .................................................................... 4-2 Figure 4-2 Interface to an MC68xxx Type BUS............................................................. 4-3 Figure 5-1 PLCC68 Package for iChip LAN CO661AL-L............................................. 5-1 Figure 6-1 Local BUS Read Cycle.................................................................................. 6-3 Figure 6-2 Local BUS Write Cycle................................................................................. 6-3 Figure 6-3 Clock Waveform............................................................................................ 6-4 Figure 6-4 Reset Timing.................................................................................................. 6-4 Figure 6-5 Parallel BUS Read Cycle ...
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... Table 4-1 Host Data Format............................................................................................ 4-1 Table 6-1 Environmental Specificati o ns – Maximum Ratings........................................ 6-1 Table 6-2 DC Operating Characteristics .......................................................................... 6-1 Table 6-3 Switching Characteristics................................................................................ 6-2 Table 8-1 Internet Protocol Compliance .......................................................................... 8-1 Table 9-1 Terms and Acronyms...................................................................................... 9-2 iChip LAN CO661AL-L Datasheet Tables vii ...
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... CO561AD-L. It includes a host interface that supports 230 kbps bandwidth in serial mode and will support 500 Kbytes/Sec burst with up to 400 Kbytes/Sec sustained bandwidth in parallel mode. CO661AL-L features power save modes and will have an extended temperature range version. iChip LAN CO661AL-L Datasheet ...
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... Supports several layers of status reports. Internal self-test procedures. ● Automatic power save mode ● Sleep Mode (with external glue logic) ● iChip LAN CO661AL-L Datasheet SRAM 128 KB AD0-AD15 CPU A0-A19 Core -RD -WR LANINT ● Auto baud rate detection up to 115,200 bps. ...
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... Ordering Information 2.1 iChip LAN CO661AL-L Order Number CO661AL-L Product Code Version LAN Typical Clock Rate 18.432 MHz Package PLCC 68 Pin Temperature Range Commercial (0 to70º 158° F) Voltage 3.3V iChip LAN CO661AL-L Datasheet / – 3 2-1 ...
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... Email, Web and WAP pages/files, utilize FTP and Telnet serve as a serial- to-Internet router. iChip LAN CO661AL-L contains non-volatile flash memory to store its firmware and Internet-related configuration parameters. Remote firmware and parameter updates are supported through the local host link, by Email or using its configuration Web site. ...
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... Full EIA-232-D hardware flow control, including Tx, Rx, CTS, RTS, DTR, and DSR lines, is supported. CO661AL-L supports standard baud rate configurations from 2,400 bps up to 230,400 bps on the host asynchronous serial communications channel. The default baud rate may be changed permanently by using the AT+iBDRF command. Auto baud rate setting is supported for all baud rates except 230,400 ...
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... The host can program iChip LAN to either use hardware flow control or “Wait/Continue” software flow control. The flow control mechanism is based on the RTS/CTS signals. The host parallel connection has built-in hardware flow control signals as part of the interface logic. iChip LAN CO661AL-L Datasheet Functional Description 3-3 ...
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... Hardware Interface iChip LAN CO661AL-L may interface a host CPU in one of two methods: Serial or Parallel. The actual interface depends on the state of the –SER/PAR pin. 4.1 Serial Host Interface The host interface is a serial DTE interface. Speeds of 2400, 4800, 9600, 19200, 38400, 57600, 115200 and 230400 bps are supported in the following data format: ...
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... LAN. When the host reads the data, this signal goes LOW. This pin may be connected to an interrupt or I/O pin on the 80x86. Note 1: HOBE and HIBF complement PIBF and POBE respectively. iChip LAN CO661AL-L Datasheet Hardware Interface EPM7032AEC44 iChip LAN ...
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... LAN. When the host reads the data, this signal goes low. This pin may be connected to an interrupt or I/O pin on the MC68xxx. Note 1: HOBE and HIBF complement PIBF and POBE respectively. iChip LAN CO661AL-L Datasheet Hardware Interface EPM7032AEC44 iChip LAN ...
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... LAN Interface iChip LAN directly interfaces an Ethernet LAN MAC/PHY device on its 16-bit local BUS. Currently iChip LAN supports the Crystal LAN CS8900A Ethernet controllers for 10BaseT and SMSC LAN91C111 and ASIX AX88796L Ethernet controllers for 10/100BaseT. iChip LAN CO661AL-L Datasheet Hardware Interface 4-4 ...
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... A17 D14 10 D13 11 -RES 12 D11 -DSRH/-PRES 15 D10 Figure 5-1 PLCC68 Package for iChip LAN CO661AL-L iChip LAN CO661AL-L Datasheet iChip LAN CO661AL Pin Descriptions A13 A19/Z7 A15 ...
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... O 31 iChip LAN CO661AL-L Datasheet Description Address BUS: These pins supply addresses to the system. These pins should be connected to the address BUS of the LAN controller. Address BUS MSB. This pin should be connected to the LAN controller’s address BUS MSB ...
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... Type Pin No iChip LAN CO661AL-L Datasheet Description READ: This pin indicates that iChip LAN is performing a read cycle. This pin should be connected to -RD on the LAN controller. WRITE: This pin indicates that iChip LAN is performing a write cycle This pin should be connected to -WR on the LAN controller ...
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... iChip LAN CO661AL-L Datasheet Description LAN Mode Select: • When this pin is held LOW during power up for at least 5 seconds, iChip LAN will automatically enter firmware update mode. • During a firmware update procedure, when an external modem dials to the iChip LAN, pulling this ...
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... Z0 I/O 14 Z1/PCS I/O 21 iChip LAN CO661AL-L Datasheet Description AT+i Configurable Pin: CLKO (default): Clock Output. This pin provides a clock-out to the system at the same frequency as X1. During reset the clock out is disabled. HBT: Heart Beat. Provides a 50% duty cycle, 40 mSec frequency square wave, when iChip firmware is properly running ...
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... GND P 67 VCC P iChip LAN CO661AL-L Datasheet Description In Serial mode available as a GPIO for future use and should be left Not Connected. In Parallel mode: POBE is used as the Parallel Output Buffer Empty signal. When HIGH, iChip LAN may send a parallel data byte to the host. ...
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... I 59 -RTSH/-PERR O 58 iChip LAN CO661AL-L Datasheet Description In Serial mode: Transmit Data Host: This pin supplies asynchronous serial transmit data to the host. In Parallel mode: this pin is used for firmware update. In Serial mode: Receive Data Host: This pin supplies asynchronous serial receive data from the host ...
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... Type Pin No. -DSRH/-PRES I 15 -DTRH O 63 iChip LAN CO661AL-L Datasheet Description In Serial mode: Data Set Ready Host: When -DSRH is LOW, it indicates that the host is attached and ready to communicate with iChip LAN. Connect -DSRH to GND when not in use. In Parallel mode: Parallel Reset, when LOW, generates a reset to the parallel interface ...
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... Input capacitance Notes: I 2mA 2mA OL = 18.432 MHz clock 3 Table 6-2 DC Operating Characteristics iChip LAN CO661AL-L Datasheet Electrical/Mechanical Specifications Rating -0.5 to +5.5 Volts 0°C to 70°C (32 to 158°F) -60°C to 120°C (–76 to 248°F) 220°C (428°F) 1.5 Watts Min Typical Max 3.0 3.3 3 ...
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... X2 to CLKO skew Reset pulse Read rising to input parallel buffer full Write rising to output parallel buffer empty Table 6-3 Switching Characteristics 1 Fall time is from 2.3V to 1V. 2 Rise time is from 1V to 2.3V. iChip LAN CO661AL-L Datasheet Electrical/Mechanical Specifications Symbol Min. Typical Fclk 18.43 18.432 Tclk 1/Fck Txfac 4 ...
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... Tclk X2 Txfac A18-A0 -BHE D15-D0 (Write) Txrdv -FCS or -RCS * -WR Txrwa * -FCS and –RCS are internal Flash and RAM chip-select. iChip LAN CO661AL-L Datasheet Electrical/Mechanical Specifications Txfac Address Data Tdsarh Tdsbrh Txfri Figure 6-1 Local BUS Read Cycle Txfac Address Data Tdovaw Txfwi ...
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... Clock Waveform X1 X2 CLKOUT Tckhl 6.2.5 Reset Timing -RES iChip LAN CO661AL-L Datasheet Electrical/Mechanical Specifications Tchck Tclck Tcico Tcklh Figure 6-3 Clock Waveform Trst Figure 6-4 Reset Timing 6-4 ...
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... PCS -RD PIBF -WR*-CS Host Figure 6-5 Parallel BUS Read Cycle 6.2.7 Parallel BUS Write Cycle X2 Txfac D7-D0 (Write) PCS Txrdv -WR POBE -RD*-CS Host Figure 6-6 Parallel BUS Write Cycle iChip LAN CO661AL-L Datasheet Electrical/Mechanical Specifications Txfac Data Tdsbrh Txrra Trrbf Txfri Data Tdovaw Twrbe Txfri Tdsarh 6-5 ...
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... Mechanical Dimensions 1.27mm / 0.050” 24.5mm / 0.965” 4 0.193” 2. 0.106” Figure 6-7 Mechanical Dimensions iChip LAN CO661AL-L Datasheet Electrical/Mechanical Specifications 0 0.020” CO661AL - S TM iChip 25.2mm / 0.995” 1. 0.070” 6-6 ...
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... Serial CPU (Host) LAN Figure 7-1 Serial Host and Ethernet Controller Environment 7.2 Parallel Host and Ethernet Controller Environment Embedded CPU (Host) PAL Parallel Figure 7-2 Parallel Host and Ethernet Controller Environment iChip LAN CO661AL-L Datasheet D0-D15 A0-A19 -RD -WR LANINT D0-D15 A0-A19 iChip Parallel ...
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... The recommended range of values for C 1 and C 2 are as follows ............................................................... 15 pF ± 20 ............................................................... 22 pF ± 20% The specific values for C1 and C2 must be determined by the designer and are dependent on the characteristics of the chosen crystal and board design. iChip LAN CO661AL-L Datasheet X1 Crystal X2 Figure 7-3 Selecting a Crystal ...
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... Supervisory Circuit Vcc Vcc R1 C11 4.7K 0.1UF GND PFI GND MAX708R GND C15 + 1UF/16V GND Figure 7-5 Supervisory Reset Circuit iChip LAN CO661AL-L Datasheet τ should be greater than 10 10K -RES 10U Figure 7-4 RC Reset Circuit RESET -RES 7 RESET 5 PFO iChip Designs 7-3 ...
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... Sleep Mode The CO661AL-L iChip LAN supports a Sleep mode to achieve maximum power conservation when the iChip is not in use. Sleep mode is based on an external circuit that gates the oscillator input to the iChip. The PWSG (pin 41 output pin used to trigger Sleep mode. While in this mode, iChip current consumption is reduced to ~1 mA. The external circuit is designed to wake-up and exit sleep mode when a transmission arrives from the host processor (see Fig ...
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... Protocol Compliance iChip LAN CO661AL-L complies with the following Internet standards: User Datagram Protocol (UDP) RFC 768 Internet Protocol (IP) RFC 791 RFC 792 Internet Control Message Protocol RFC 793 Transmission Control Protocol (TCP) RFC 821 Simple Mail Transfer Protocol (SMTP) RFC 826 ...
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... PC) users through a dial-up connection. LAN Local Area Network. HIGH-speed, LOW-error data network covering a relatively small geographic area ( few thousand meters). Link Control Protocol. Negotiates data link characteristics and tests the LCP integrity of the link. iChip LAN CO661AL-L Datasheet List of Terms and Acronyms 9-1 ...
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... Internet. Works in conjunction with its underlying IP protocol. An option designating whether retrieved Email messages are to be left intact "Leave on on the server for subsequent downloads or are to be deleted from the server Server" after a successful download. iChip LAN CO661AL-L Datasheet List of Terms and Acronyms Table 9-1 Terms and Acronyms 9-2 ...