co661al-s Connect One Ltd., co661al-s Datasheet
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co661al-s Summary of contents
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... CO661AL-S Datasheet Pub. No. 11-3600-02, ©Copyright February 2003 iChip TM Ver. 1.05 International: Connect One Ltd. 2 Hanagar Street Kfar Saba 44425, Israel Tel: +972-9-766-0456 Fax: +972-9-766-0461 E-mail: info@connectone.com http://www.connectone.com USA: Connect One Semiconductors, Inc. 15818 North 9th Ave. Phoenix, AZ 85023 ...
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... Connect One. iChip, iChip LAN, iChip Plus, Socket iChip, Embedded iModem, Internet Controller, iConnector, iLAN, iModem, Instant Internet, AT+i, and Connect One are trademarks of Connect One Ltd. Copyright 2000 - 2003 Connect One Ltd. All rights reserved. iChip CO661AL-S Datasheet ii ...
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... Revision History 11-3600-02 Version Date 1.00 December 2002 1.04 January 2003 1.05 February 2003 iChip CO661AL-S Datasheet Description Original Release for iChip CO661AL-S Internal Editing Change POBE pin description iii ...
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... Hardware Interface................................................................................................. 4-1 4.1 Serial Host Interface .................................................................................... 4-1 4.2 Parallel Host Interface 4.2.1 80x86 BUS................................................................................................... 4-2 4.2.2 MC68xxx BUS............................................................................................. 4-3 4.3 Serial Modem Interface................................................................................ 4-4 5 Pin Descriptions....................................................................................................... 5-1 5.1 iChip CO661AL-S Pin Assignments ........................................................... 5-1 5.2 iChip Pin Functional Descriptions ............................................................... 5-2 5.2.1 Local BUS Signals 5.2.2 Miscellaneous Signals.................................................................................. 5-4 5.2.3 Host Serial Interface Signals........................................................................ 5-6 5.2.4 iChip Serial Modem Signals ........................................................................ 5-8 6 Electrical/Mechanical Specifications ..................................................................... 6-1 6.1 Environmental Specifications ...
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... Mechanical Dimensions............................................................................... 6-6 7 iChip Designs ........................................................................................................... 7-1 7.1 Serial Host and Modem Environment.......................................................... 7-1 7.2 Parallel Host and Serial Modem Environment ............................................ 7-1 7.3 Selecting a Crystal ....................................................................................... 7-2 7.4 Selecting the Reset Circuit........................................................................... 7-3 7.4.1 RC Network ................................................................................................. 7-3 7.4.2 Supervisory Circuit ...................................................................................... 7-3 1 7.5 Sleep Mode ................................................................................................ 7-4 8 Protocol Compliance ............................................................................................... 8-1 9 List of Terms and Acronyms.................................................................................. 9-1 iChip CO661AL-S Datasheet Contents v ...
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... Figure 1-1 iChip Functional Block Diagram................................................................... 1-2 Figure 4-1 Interface to an 80x86 Type BUS .................................................................... 4-2 Figure 4-2 Interface to an MC68xxx Type BUS............................................................. 4-3 Figure 5-1 PLCC68 Package for iChip CO661AL-S...................................................... 5-1 Figure 6-1 Local BUS Read Cycle.................................................................................. 6-3 Figure 6-2 Local BUS Write Cycle................................................................................. 6-3 Figure 6-3 Clock Waveform............................................................................................ 6-4 Figure 6-4 Reset Timing.................................................................................................. 6-4 Figure 6-5 Parallel BUS Read Cycle............................................................................... 6-5 Figure 6-6 Parallel BUS Write Cycle ...
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... Table 4-1 Host Data Format............................................................................................ 4-1 Table 4-2 Host Data Format............................................................................................ 4-4 Table 6-1 Environmental Specificati o ns – Maximum Ratings........................................ 6-1 Table 6-2 DC Operating Characteristics .......................................................................... 6-1 Table 6-3 Switching Characteristics................................................................................ 6-2 Table 8-1 Internet Protocol Compliance .......................................................................... 8-1 Table 9-1 Terms and Acronyms...................................................................................... 9-2 iChip CO661AL-S Datasheet Tables vii ...
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... Web site as well as a customizable application Web site. iChip also includes a WAP server to host a WAP site. When the host CPU issues standard AT commands, iChip CO661AL-S provides direct access to the modem by automatically operating in Transparent mode, emulating a direct host-to-modem environment. When the host CPU issues AT+i commands, iChip enters Internet mode and controls the modem connection to an ISP ...
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... Internal self-test procedures. ● Automatic power save mode ● Sleep Mode (with external glue logic) ● iChip CO661AL-S Datasheet SRAM 128 KB Rx,Tx,CTS,RTS DTR,DSR,CD ● Auto baud rate detection up to 115,200 bps. ● Support for 230,400 bps (without auto baud rate). ...
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... Ordering Information 2.1 iChip CO661AL-S Order Number: CO661AL-S Product Code Version SERIAL Typical Clock Rate 18.432 MHz Package PLCC 68 Pin Temperature Range Commercial (0 to70º 158° F) Voltage 3.3V iChip CO661AL-S Datasheet / – 3 2-1 ...
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... CO661AL-S defaults to Transparent mode, allowing the host to control the modem device directly. Control is implemented by issuing standard AT commands to iChip. In this mode, iChip CO661AL-S transparently echoes the AT commands to the modem, as well as echoing the modem responses back to the host. In addition, hardware flow control signals are emulated on the host side to reflect the levels set by the modem and vice- versa ...
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... Issuing the AT+iFU command enters Firmware Update mode. iChip CO661AL-S monitors the modem for an incoming call by detecting the ‘RING’ response. When called, iChip CO661AL-S instructs the modem to answer the call and assumes a YMODEM session to receive a file containing a firmware update. The incoming file contents are downloaded and authenticated ...
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... Full EIA-232-D hardware flow control, including Tx, Rx, CTS, RTS, DTR, DSR, RI and CD lines, is supported. CO661AL-S supports standard baud rate configurations from 2,400 bps up to 230,400 bps on the host asynchronous serial communications channel. The default baud rate may be changed permanently by using the AT+iBDRF command. Auto baud rate setting is supported for all baud rates except 230,400 ...
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... Hardware Interface iChip CO661AL-S may interface a host CPU in one of two methods: Serial or Parallel. The actual interface depends on the state of the –SER/PAR pin. 4.1 Serial Host Interface The host interface is a serial DTE interface. Speeds of 2400, 4800, 9600, 19200, 38400, 57600, 115200 and 230400 bps are supported in the following data format: ...
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... When the host reads the data, this signal goes LOW. This pin may be connected to an interrupt or I/O pin on the 80x86. Note 1: HOBE and HIBF complement PIBF and POBE respectively. iChip CO661AL-S Datasheet Hardware Interface EPM7032AEC44 iChip ...
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... When the host reads the data, this signal goes low. This pin may be connected to an interrupt or I/O pin on the MC68xxx. Note 1: HOBE and HIBF complement PIBF and POBE respectively. iChip CO661AL-S Datasheet Hardware Interface EPM7032AEC44 iChip ...
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... Actual baud rate may be preprogrammed or dynamically defined as equal to the auto baud rate detected on the serial host interface (when CO661AL-S operates in Serial mode). When the CO661AL-S operates in Parallel mode, the modem interface baud rate must be preprogrammed. All serial modem input signals (RXDM, -DSRM, -CTSM, -CDM) are 5V tolerant. ...
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... A17 D14 10 D13 11 -RES 12 D11 -DSRH/-PRES 15 D10 Figure 5-1 PLCC68 Package for iChip CO661AL-S iChip CO661AL-S Datasheet CO661AL Pin Descriptions A13 Z7 A15 A12 A14 A5 A16 CLKO/HBT/Z6 ...
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... O 31 Note: 1: Currently the local BUS is not in use in the CO661AL-S. iChip CO661AL-S Datasheet Description Address BUS: These pins supply addresses to the system. These pins should be left Not Connected. Data BUS: These pins supply data to/from the system. ...
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... Type Pin No iChip CO661AL-S Datasheet Description READ: This pin indicates that iChip is performing a read cycle. This pin should be left Not Connected. WRITE: This pin indicates that iChip is performing a write cycle. This pin should be left Not Connected. Pin Descriptions ...
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... iChip CO661AL-S Datasheet Description Modem Mode Select: • When this pin is held LOW during power up for at least 5 seconds, iChip will automatically enter firmware update mode. • During a firmware update procedure, when an external modem dials to the iChip, pulling this pin down to LOW will cause the iChip to immediately answer the call and begin the update session ...
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... I/O 50 GND P 67 VCC P iChip CO661AL-S Datasheet Description AT+i Configurable Pin: CLKO (default): Clock Output. This pin provides a clock-out to the system at the same frequency as X1. During reset the clock out is disabled. HBT: Heart Beat. Provides a 50% duty cycle, 40 mSec frequency square wave, when iChip F/W is properly running ...
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... I 59 -RTSH/-PERR O 58 iChip CO661AL-S Datasheet Description Transmit Data Host: This pin supplies asynchronous serial transmit data to the host. In Parallel mode, this pin is used for firmware update. Receive Data Host: This pin supplies asynchronous serial receive data from the host. ...
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... O 63 -CDH O 60 -RIH O 20 iChip CO661AL-S Datasheet Description In Serial mode: Data Set Ready Host: When -DSRH is LOW, it indicates that the host is attached and ready to communicate with iChip. Connect -DSRH to GND when not in use. In Parallel mode: Parallel Reset, when LOW, generates a reset to the parallel interface ...
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... O 18 -CDM I 66 iChip CO661AL-S Datasheet Description Transmit Data Modem: This pin provides asynchronous serial transmit data to the modem from the serial port. This pin must remain HIGH on reset. Receive Data Modem: This pin provides asynchronous serial receive data from the modem to the asynchronous modem serial port ...
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... Table 6-2 DC Operating Characteristics Notes 2mA 2mA 18.432 MHz clock 4: Oscillator blocked with external circuit iChip CO661AL-S Datasheet Electrical/Mechanical Specifications Rating -0.5 to +5.5 Volts 0°C to 70°C (32 to 158°F) -60°C to 120°C (–76 to 248°F) 220°C (428°F) 1.5 Watts Min Typical Max 3 ...
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... TXDM high after raising reset Read rising to input parallel buffer full Write rising to output parallel buffer empty Table 6-3 Switching Characteristics 1 Fall time is from 2.3V to 1V. 2 Rise time is from 1V to 2.3V. iChip CO661AL-S Datasheet Electrical/Mechanical Specifications Symbol Min. Typical Fclk 18.43 18.432 Tclk 1/Fck Txfac 4 ...
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... Local BUS Write Cycle Tclk X2 Txfac A18-A0 -BHE D15-D0 (Write) Txrdv -FCS or -RCS * -WR Txrwa * -FCS and –RCS are internal Flash and RAM Chip-select. iChip CO661AL-S Datasheet Electrical/Mechanical Specifications Txfac Address Data Tdsarh Tdsbrh Txfri Figure 6-1 Local BUS Read Cycle Txfac Address Data Tdovaw Txfwi ...
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... Clock Waveform X1 X2 CLKOUT Tckhl 6.2.5 Reset Timing -RES Don't care TXDM iChip CO661AL-S Datasheet Electrical/Mechanical Specifications Tchck Tclck Tcico Tcklh Figure 6-3 Clock Waveform Trst Trmar Trmbr Figure 6-4 Reset Timing Don't care 6-4 ...
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... Parallel BUS Read Cycle X2 D7-D0 (Read) PCS -RD PIBF -WR*-CS Host Figure 6-5 Parallel BUS Read Cycle 6.2.7 Parallel BUS Write Cycle X2 Txfac D7-D0 (Write) PCS Txrdv -WR POBE -RD*-CS Host Figure 6-6 Parallel BUS Write Cycle iChip CO661AL-S Datasheet Electrical/Mechanical Specifications Txfac Data Tdsbrh Txrra Trrbf Txfri Data Tdovaw Twrbe Txfri Tdsarh 6-5 ...
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... Mechanical Dimensions 1.27mm / 0.050” 24.5mm / 0.965” 4 0.193” 2. 0.106” Figure 6-7 Mechanical Dimensions iChip CO661AL-S Datasheet Electrical/Mechanical Specifications 0 0.020” CO661AL - S TM iChip 25.2mm / 0.995” 1. 0.070” 6-6 ...
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... Serial Host and Modem Environment Embedded CPU (Host) Figure 7-1 Serial Host and Modem Environment 7.2 Parallel Host and Serial Modem Environment Embedded Parallel CPU (Host) Figure 7-2 Parallel Host and Serial Modem Environment iChip CO661AL-S Datasheet Data iChip Serial Serial Modem Parallel iChip Serial ...
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... The recommended range of values for C 1 and C 2 are as follows ............................................................... 15 pF ± 20 ............................................................... 22 pF ± 20% The specific values for C1 and C2 must be determined by the designer and are dependent on the characteristics of the chosen crystal and board design. iChip CO661AL-S Datasheet X1 Crystal X2 Figure 7-3 Selecting a Crystal ...
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... Supervisory Circuit Vcc Vcc R1 C11 4.7K 0.1UF GND PFI GND MAX708R GND C15 + 1UF/16V GND Figure 7-5 Supervisory Reset Circuit iChip CO661AL-S Datasheet τ should be greater than 10 mSec. 10K -RES 10U Figure 7-4 RC Reset Circuit RESET -RES 7 RESET 5 PFO iChip Designs 7-3 ...
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... Sleep Mode CO661AL-S iChip supports a Sleep mode to achieve maximum power conservation when iChip is not in use. Sleep mode is based on an external circuit that gates the oscillator input to iChip. The PWSG (pin 41 output pin used to trigger sleep mode. While in this mode, iChip current consumption is reduced to ~1 mA. The external circuit is designed to wake-up and exit Sleep mode when a transmission arrives from either the host processor or the modem (see Fig ...
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... Protocol Compliance iChip CO661AL-S complies with the following Internet standards: User Datagram Protocol (UDP) RFC 768 Internet Protocol (IP) RFC 791 RFC 792 ICMP – Internet Control Message Protocol RFC 793 Transmission Control Protocol (TCP) RFC 821 Simple Mail Transfer Protocol (SMTP) ...
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... Request For Comments. Collections of standards that define the way remote RFC computers communicate over the Internet. SMTP Simple Mail Transfer Protocol. Provides for transferring mail reliably and efficiently over the Internet. iChip CO661AL-S Datasheet List of Terms and Acronyms 9-1 ...
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... Transmission Control Protocol. Provides reliable stream-oriented connections over the Internet. Works in conjunction with its underlying IP protocol. Network Terminal Protocol. Provides remote terminal connectivity, which Telnet allows to execute tasks on a remote application server. iChip CO661AL-S Datasheet List of Terms and Acronyms Table 9-1 Terms and Acronyms 9-2 ...