smc256bfd6e STMicroelectronics, smc256bfd6e Datasheet - Page 45

• Manufacturer Part Number: smc256bfd6e
• Description: 32mbyte, 64mbyte, 128mbyte, 256mbyte, 512mbyte, 1gbyte, 2gbyte, And 4gbyte 3.3/5v Supply Compactflash Card
• Manufacturer: STMicroelectronics

SMCxxxBF
8.3
Contiguous I/O Mapped Addressing
When the system decodes a contiguous block of I/O registers to select the Card, the
registers are accessed in the block of I/O space decoded by the system as shown in
Table 38
As for the Memory Mapped Addressing, register 0 is accessed with –CE1 Low and –CE2
Low (and A0 don’t Care) as a Word register on the combined Odd and Even Data Bus (D15
to D0). This register may also be accessed with –CE1 Low and –CE2 High, by a pair of Byte
accesses to offset 0. The address space of this Word register overlaps the address space of
the Error and Feature Byte-wide registers at offset 1. When accessed twice as Byte register
with –CE1 Low, the first Byte is the even Byte of the Word and the second is the odd Byte. A
Byte access to register 0 with –CE1 High and –CE2 Low accesses the error (read) or
feature (write) register.
Registers at offset 8, 9 and D are non-overlapping duplicates of the registers at offset 0 and
1. Register 8 is equivalent to register 0, while register 9 accesses the odd Byte. Therefore, if
the registers are Byte accessed in the order 9 then 8 the data will be transferred odd Byte
then even Byte. Repeated Byte accesses to register 8 or 0 will access consecutive (even
than odd) Bytes from the data buffer. Repeated Word accesses to register 8, 9 or 0 will
access consecutive Words from the data buffer, however repeated Byte accesses to register
9 are not supported. Repeated alternating Byte accesses to registers 8 then 9 will access
consecutive (even then odd) Bytes from the data buffer.
Table 38.
–
REG
0
0
0
0
0
0
0
0
0
0
0
0
0
A10 to
A4
X
X
X
X
X
X
X
X
X
X
X
X
X
Contiguous I/O Decoding
A3
0
0
0
0
0
0
0
0
1
1
1
1
1
A2
0
0
0
0
1
1
1
1
0
0
1
1
1
A1
0
0
1
1
0
0
1
1
0
0
0
1
1
A0
0
1
0
1
0
1
0
1
0
1
1
0
1
Offset
Dh
Eh
0h
1h
2h
3h
4h
5h
6h
7h
8h
9h
Fh
Dup. Odd Data Register Dup. Odd Data Register
Drive Address Register
Cylinder High Register
Sector Count Register
Cylinder Low Register
Even Data Register
Dup. Error Register
Select Card/Head
Alternate Status
Dup. Even Data
Status Register
Sector Number
Error Register
–
Register
Register
Register
Register
IORD=0
Device Control Register
Cylinder High Register
Sector Count Register
Dup. Feature Register
Cylinder Low Register
Even Data Register
Command Register
Software interface
Select Card/Head
Feature Register
Dup. Even Data
Sector Number
–
Reserved
Register
Register
Register
IOWR=0
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