w86l488y-ay Winbond Electronics Corp America, w86l488y-ay Datasheet - Page 27

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w86l488y-ay

Manufacturer Part Number
w86l488y-ay
Description
Winbond Host Interface Sd/sdio/mmc Memory Card Bridge
Manufacturer
Winbond Electronics Corp America
Datasheet
7.3
Hardware Reset:
Hardware reset results from asserting RSTN pin for more than 1uS.
(1) Clear Receive and Transmit data buffer.
(2) All the internal logic will be reset to initial state.
(3) The content of all registers are restored to default values.
Software Reset:
Software reset is executed by configuring Control Reg..
(1) Clear Receive and Transmit data buffer.
(2) All the internal logic will be reset to initial state.
(3) The content of all registers are not affected.
In W86L488AY, the port A and port B will reset at the same time if global software reset in the Global
Control Reg. is set.
Data Buffer Reset:
Data buffer reset is executed by configuring Control Reg..
(1) Clear receive data buffer and transmit data buffer simultaneously.
(2) The serial interface command will affected if the data receive or transmit command is progressing.
(3) Internal logic state and the content of registers are not affected.
7.4
The internal clock source of W86L488Y/AY is fed on XTO pin and XTI pin may be used as clock input
by crystal or oscillator. The operation frequency is required from 3.58MHz to 25MHz. In W86L488AY,
the clock driver will be disabled when port A and port B are into power down or Global Control Reg. is
configured.
Reset Action
Clock Source
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W86L488

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