saa5249 NXP Semiconductors, saa5249 Datasheet - Page 4

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saa5249

Manufacturer Part Number
saa5249
Description
Integrated Vip And Teletext With Background Memory Controller Ivt1.1bmcx
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
PINNING
1996 Nov 07
n.c.
n.c.
V
OSCOUT
OSCIN
GNDO
V
REF+
BLACK
CVBS
IREF
V
POL
STTV/LFB
VCR/FFB
V
REF
R
G
B
RGBREF
BLANK
V
CAS0
CAS1
A4
A3
COR
ODD/EVEN
SYMBOL
DD1
SS1
DD2
SS2
SS3
Integrated VIP and Teletext with
Background Memory Controller
SOT240-1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
PIN
SOT319-1
54, 55
25
27
28
29
12
32
35
36
37
38
39
40
42
30
31
49
50
51
52
53
56
57
58
59
60
61
1
2
(1)
not connected
not connected
+5 V supply
27 MHz crystal oscillator output
27 MHz crystal oscillator input
0 V crystal oscillator ground
0 V ground
positive reference voltage; this pin should be connected to ground via a
100 nF capacitor
video black level storage pin; this pin should be connected to ground via a
100 nF capacitor
composite video input pin; a positive-going 1 V (p-p) input is required,
connected via a 100 nF capacitor
reference current input pin; connected to ground via a 27 k resistor
+5 V supply
STTV/LFB/FFB polarity selection pin
sync to TV output pin/line flyback input pin; function controlled by an
internal register bit (scan sync mode)
PLL time constant switch/field input pin; function controlled by an internal
register bit (scan sync mode)
0 V ground
negative reference voltage; this pin should be connected to REF+ via a
100 nF capacitor
dot rate character output of the RED colour information
dot rate character output of the GREEN colour information
dot rate character output of the BLUE colour information
input DC voltage to define the output high level on the RGB pins
dot rate fast blanking output
0 V ground; internally connected for SOT319
column address select to external DRAM for BMCX function
column address select to external DRAM for BMCX function for second
DRAM where two 256 k
address output to external DRAM for BMCX function
address output to external DRAM for BMCX function
programmable output to provide contrast reduction of the TV picture for
mixed text and picture displays or when viewing newsflash/subtitle pages;
open drain output
25 Hz output synchronized with the CVBS input field sync pulses to
produce a non-interlaced display by adjustment of the vertical deflection
currents
4
4 devices are used
DESCRIPTION
Preliminary specification
SAA5249

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