hcts00ms Intersil Corporation, hcts00ms Datasheet
hcts00ms
Manufacturer Part Number
hcts00ms
Description
Radiation Hardened Quad 2-input Nand Gate
Manufacturer
Intersil Corporation
Datasheet
1.HCTS00MS.pdf
(9 pages)
August 1995
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
• Dose Rate Survivability: >1 x 10
• Dose Rate Upset >10
• Cosmic Ray Upset Immunity < 2 x 10
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
• CMOS Input Compatibility Ii
Description
The Intersil HCTS00MS is a Radiation Hardened Quad 2-Input
NAND Gate. A high on both inputs forces the output to a Low
state.
The HCTS00MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of radia-
tion hardened, high-speed, CMOS/SOS Logic Family.
The HCTS00MS is supplied in a 14 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
HCTS00DMSR
HCTS00KMSR
HCTS00D/
Sample
HCTS00K/
Sample
HCTS00HMSR
(Typ)
- VIL = 0.8V Max
- VIH = VCC/2 Min
NUMBER
PART
TEMPERATURE
-55
-55
o
o
RANGE
C to +125
C to +125
+25
+25
+25
10
o
o
o
C
C
C
RAD (Si)/s 20ns Pulse
|
o
o
Copyright
C
C
5 A at VOL, VOH
Intersil Class
S Equivalent
Intersil Class
S Equivalent
Sample
Sample
Die
SCREENING
12
o
C to +125
LEVEL
©
RAD (Si)/s
-9
Intersil Corporation 1999
Errors/Gate Day (Typ)
o
-9
C
2
14 Lead SBDIP
14 Lead Ceramic
Flatpack
14 Lead SBDIP
14 Lead Ceramic
Flatpack
Die
/mg
Errors/Bit-Day
PACKAGE
370
Pinouts
NOTE: L = Logic Level Low, H = Logic level High
Functional Diagram
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(2, 5, 10, 13)
HCTS00MS
GND
(1, 4, 9, 12)
A1
B1
A2
B2
Y1
Y2
An
H
H
An
Bn
L
L
(FLATPACK) MIL-STD-1835 CDFP3-F14
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
GND
INPUTS
A1
B1
Y1
A2
B2
Y2
MIL-STD-1835 CDIP2-T14
Quad 2-Input NAND Gate
1
2
3
4
5
6
7
TRUTH TABLE
1
2
3
4
5
6
7
TOP VIEW
TOP VIEW
Radiation Hardened
Bn
H
H
L
L
Spec Number
14
13
12
11
10
9
8
File Number
14
13
12
11
10
9
8
VCC
B4
A4
Y4
B3
A3
Y3
OUTPUTS
Yn
H
H
H
L
Yn
(3, 6, 8, 11)
518774
2139.2
VCC
B4
A4
Y4
B3
A3
Y3
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