cx29610 Mindspeed Technologies, cx29610 Datasheet - Page 90

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cx29610

Manufacturer Part Number
cx29610
Description
Optiphytm - M622 Sts-12/4x Sts-3 Sonet/sdh Multiplexer
Manufacturer
Mindspeed Technologies
Datasheet

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2.0 Functional Description
2.6 SI-Bus Interface
2.6.3 Operation
Figure 2-19. SI-Bus Clock Relationships
2-46
2.6.3.1 Clock Operation
TxHSClk/RxHSClk
Data Transfer
(e.g. TxStart)
Clock Edges
(51.84 MHz)
TxClk/RxClk
(19.44 MHz)
155.52 MHz
The following sections describe the operation of the transmit and receive
interfaces, which can connect three slave devices, capable of processing multiple
(or single) STS-1 data streams, to a single CX29610.
NOTE:
The octet transfer rate across the SI-Bus interface is 19.44 MHz in each direction
synchronous with TxClk and RxClk. Also, the TxHSClk and RxHSClk provided
on the interface are 51.84 MHz, which eliminates the need for clock
multiplication in the slave device. The high speed clocks are not used by the
interface for data transfer/sampling but are used in the slave devices for deriving
sub-STS-1 payload clocks.
and data transfers relative to the 155.52 MHz line rate clock for the STS-3. The
TxHSClk and RxHSClk signals present on the SI-Bus interface are 51.84 MHz
clocks derived from the 155.52 MHz line clocks as a divide-by-three. The octet
clocks TxClk and RxClk are 19.44 MHz clocks derived from the 155.52 MHz
line clocks as a divide-by-eight.
Each port (1–4) of the CX29610 is an independent master for its own
SI-Bus.
Mindspeed Technologies
Figure 2-19
illustrates the relationship of the clock
CX29610 Data Sheet
100518_017
29610-DSH-001-C
CX29610

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