cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 91
cx29503
Manufacturer Part Number
cx29503
Description
Cx29503 Broadband Access Multiplexer Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
1.CX29503.pdf
(388 pages)
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CX29503 Data Sheet
Table 2-12. Mapping of Data To and From Overhead TSB Time Slots <tableContinuation>(1 of 2)
29503-DSH-002-B
Source/Destination
DS1/E1 Framer
No. 1–28
DS3/E3 Framer
SONET: STS-3
SDH: STM-1
Mapper
SONET: STS-3
SDH: STM-1
Mapper
SONET: STS-3 or
STS-3c SDH: STM-1
(VC-4 or AU-3 with
VC-3) Mapper
SONET: STS-3 or
STS-3c
SDH: STM-1
(VC-4 or AU-3 with
VC-3) Mapper
SONET: STS-3
SDH: STM-1
(VC-4 or AU-3 with
VC-3) Mapper
VC (VC-11 POH)
Mapper
No.1–28 or
CSP
TS Bus
FDL Data Link Bit (4 Kbps) or
Sa4 through Sa8 Data Link Bits
(4–20 Kbps)
DS3 TDL Bits (28.2 Kbps) or
E3 G.751 Mbits (22.375 Kbps)
or E3 G.832 NR/GC Byte
(64 Kbps)
Regenerator Section Data
Communication Channel
(DCCR) POH Bytes 1–3
Multiplex Section (Line) Data
Communication Channel
(DCCM) POH Bytes 1–9
Sonet: Path User Channel
(STS-3) or DQDB Mgmt Info
(STS-3c per GR-253) SDH:
Path User Channel: F2 POH
Byte
Sonet: Path User Channel
(STS-3) or DQDB Mgmt Info
(STS-3c per GR-253) SDH:
Path User Channel: F3 POH
Byte
Sonet: Spare Byte SDH: APS (4
MS bits) and Spare Bits (4 LS
bits) K3 POH Byte
APS (8 Kbps per Mapper) K4
POH (4 MS bits) or BAM
Register Access
Overhead Data Communication Channel
Mapped to Logical Channels (LCs)
For example,
of the Sa4–Sa8 overhead communications channel bits. These bits have a maximum
required data rate of 20 kbps if all 5 Sa bits are used for the communications channel.
Because each overhead TSB time slot has a minimum data rate capacity of 102 kbps,
only 1 time slot per E1 framer is required to carry the 5 Sa bit communications
channel. Therefore, no time slots are concatenated. Each time slot carrying the Sa bits
is mapped to one LC in CX28500. The table shows that overhead TSB time slot
numbers 1–21 (when 21 E1 signals are carried by a DS2 signal) are used to carry the
Sa bits and that these bits are mapped to LC numbers 1–21. The combined maximum
data rate for all 21 E1 framers carrying the 5 Sa4–Sa8 bits is 420 kbps.
Description
Mindspeed Technologies™
Table 2-12
Preliminary Information
shows that each of the 21 E1 framers is the source/destination
Max Data
420 Kbps
192 Kbps
576 Kbps
224 Kbps
64 Kbps
64 Kbps
64 Kbps
64 Kbps
Rate
30–31
32–35
39–66
Time
Nos.
1–28
Slot
29
36
37
38
(Min 102 Kbps
per Time Slot)
Concatenated
Time Slots
30–31
32–35
None
None
None
None
None
None
Logical Channel (LC) No.
for i = 1 to 21/16 (E1)
for i = 1 to 28 (DS1);
One Time Slot (TS)
One Time Slot (TS)
HDLC Controller
per LC No. 35–62
LC # i = TS # i
per LC No.:
Functional Description
29
30
31
32
33
34
2
-
43
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