mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 198

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mfr4200

Manufacturer Part Number
mfr4200
Description
Flexray Communication Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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MFR4200 FlexRay Communication Controller
Initialization of the CC is done on leaving the hard reset state, i.e. on a rising edge of the hard reset signal
(see
wait until initialization is complete, before reading or writing to the controller.
During this internal initialization procedure, the CC initializes its internal memory including following
configuration/control parameters of its message buffers.
During the internal initialization procedure the host must not access any of the CC registers except MNR
(see
initialization procedure.
The CC exits the hard reset state and enters the configuration state, after the hard reset signal is negated
(see
198
Section 3.2.3.1.3, “Magic Number Register
Section 3.2.3.1.3, “Magic Number Register
Section 3.2.3.2.1, “Module Configuration Register 0
Frame ID = 0x0
CCFnR: Cycle Count Mask and Cycle Counter Value fields = 0
BUFCSnR:
— BUFCMT = 0
— ChA, ChB = 0
— BT= 0
— CCFE = 0
— TT = 0
— LOCK = 0
— IFLG = 0
— VALID = 0
— IENA = 0
— CFG = 0
— DATAUPD = 0
In the hard reset state, the host MCU type is not defined. If the host accesses
the CC during this state, the CC can enter into an unpredictable state.
Therefore, the host is prohibited from performing any accesses to the CC
when the CC is in the hard reset state.
MFR4200 Data Sheet, Rev. 0
(MNR)”). After leaving the hard reset state, the host must
(MNR)), which acknowledges the end of the internal
NOTE
(MCR0)”).
Freescale Semiconductor

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