mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 65

• Manufacturer Part Number: mfr4200
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

NSYNC — Node Synchronized
This read-only bit is set when the controller enters the normal state in the course of startup or reintegration.
The NSYNC is set by the CC in the NIT preceding a transition to normal operation. The NSYNC is cleared
by the CC in the NIT, prior to switching to the normal passive state (the ‘yellow’ error state; see
Section 3.2.3.6.5, “Error Handling Level Register
state; see
1 – Node is synchronized to cluster.
0 – Node is not synchronized to cluster.
ENSYNFF — Enable Sync Frame Filters
This bit enables/disables acceptance and rejection filtering for sync frames (see
Frame Acceptance Filter Value Register
Filter Mask Register
(SYNFRFR)”).
1 – Sync frames are used for the clock synchronization only when they pass the acceptance filter and are
not rejected by the rejection filter.
0 – Sync frames are used for the clock synchronization independently of the acceptance and rejection filter.
CAE — Channel A Enable
This bit enables channel A. It can be written during the configuration state only.
1 – Channel A is enabled.
0 – Channel A is disabled.
CBE — Channel B Enable
This bit enables channel B. It can be written during the configuration state only.
1 – Channel B is enabled.
0 – Channel B disabled.
Freescale Semiconductor
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•
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…the correction value exceeding MRCR (see
Register
…the offset correction value exceeding MOCR (see
Correction Register
…the CCFCR value (see
exceeding MOCWCPR (see
Passive Register
Without Clock Correction Fatal Register
Section 3.2.3.6.5, “Error Handling Level Register
It is not possible to mix different RS485’s in a cluster or per channel, or to
mix RS485 and Optical/Electrical PHY.
(MRCR)”)
(SYNFAFMR)” and
(MOCWCPR)”) or MOCWCFR (see
(MOCR)”)
Section 3.2.3.6.4, “Clock Correction Failed Counter Register
Section 3.2.3.5.3, “Maximum Odd Cycles Without clock Correction
MFR4200 Data Sheet, Rev. 0
(SYNFAFVR)”,
Section 3.2.3.8.3, “Sync Frame Rejection Filter Register
(MOCWCFR)).
NOTE
(EHLR)”) or the Diagnosis Stop state (the ‘red’ error
Section 3.2.3.3.25, “Maximum Rate Correction
Section 3.2.3.8.2, “Sync Frame Acceptance
(EHLR)”), due to…
Section 3.2.3.3.24, “Maximum Offset
Section 3.2.3.5.2, “Maximum Odd Cycles
Section 3.2.3.8.1, “Sync
Memory Map and Registers
(CCFCR)”)
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