HFA3783IN96 INTERSIL [Intersil Corporation], HFA3783IN96 Datasheet - Page 12

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HFA3783IN96

Manufacturer Part Number
HFA3783IN96
Description
I/Q Modulator/Demodulator and Synthesizer
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet

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HFA3783IN96
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HFA3783IN96
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DC Offset Calibration Counter
C(0-6)
C(11)
BIT
DATA
CLK
LE
CAL TIME = 22
Least Significant bit C(0) to Most significant bit C(6) of the offset calibration counter/divider. The calibration clock frequency and
calibration time is defined by the Reference signal frequency divided down by this counter as follows:
Set output bias level for AC coupling applications and TX/RX switching improvement in performance.
DAT/CLK
SET UP
BIT 20
MSB
DAT/CLK
HOLD
12
FIGURE 1. PLL SYNTHESIZER SERIAL INTERFACE TIMING DIAGRAM
----------------------------------- -
REFIN (MHz)
2
CLK WIDTH
C
HIGH
CLK WIDTH
LOW
HFA3783
DESCRIPTION
BIT 2
BIT 1
LSB
CLK/LE
SET UP
P. WIDTH
LE

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