em78f644nso28s ELAN Microelectronics Corp, em78f644nso28s Datasheet - Page 114

• Manufacturer Part Number: em78f644nso28s
• Description: Flash Series 8-bit Microcontroller
• Manufacturer: ELAN Microelectronics Corp

EM78F648/644/642/641/548/544/542/541N
8-Bit Microcontroller
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SO:
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SCK:
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/SS:
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Program the same clock rate and clock edge to latch on both the Master and
Slave devices.
The received byte will update the transmitted byte.
The RBF will be set when the SPI operation is completed.
Timing is shown in Figures 6-17a and 6-17b below (Section 6.7.4).
Serial Data Out
Transmit in sequential order. The Most Significant Bit (MSB) first, the Least
Significant Bit (LSB) last
Program the same clock rate and clock edge to latch on both the Master and
Slave devices
The received byte will update the transmitted byte
The CES bit will reset as the SPI operation is completed
Timing is shown in Figures 6-17a and 6-17b below (Section 6.7.4).
Serial Clock
Generated by a Master device
Synchronize the data communication on both the SI and SO pins
The CES is used to select the edge to communicate.
The SBR0~SBR2 is used to determine the communication baud rate.
The CES, SBR0, SBR1, and SBR2 bits have no effect under Slave mode
Timing is shown in Figures 6-17a and 6-17b below (Section 6.7.4).
Slave Select; negative logic
Generated by a Master device to indicate the Slave(s) to receive data
Goes low before the first cycle of SCK appears, and remains low until the
last (eighth) cycle is completed.
Ignores the data on the SI and SO pins while /SS is high. This is due to the
SO is no longer driven.
Timing is shown in Figures 6-17a and 6-17b below (Section 6.7.4).
(This specification is subject to change without further notice)
Product Specification (V1.0) 05.05.2010