em78f644nso28s ELAN Microelectronics Corp, em78f644nso28s Datasheet - Page 74

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em78f644nso28s

Manufacturer Part Number
em78f644nso28s
Description
Flash Series 8-bit Microcontroller
Manufacturer
ELAN Microelectronics Corp
Datasheet
EM78F648/644/642/641/548/544/542/541N
8-Bit Microcontroller
64 •
6.3.29 Bank0 R2B: SPICR (SPI Control Register)
Bit 7 (CES):
Bit 6 (SPIE): SPI Enable bit
Bit 5 (SRO): SPI Read Overflow bit
Bit 4 (SSE):
Bit 3 (SDOC): SDO output status control bit
Bits 2~0 (SBRS2~SBRS0): SPI Baud Rate Select bits
SBRS2
Bit 7
CES
0
0
0
0
1
1
1
1
SBRS1
SPIE
Bit 6
Clock Edge Select bit
0: Data shifts out on rising edge and shifts in on falling edge. Data is
1: Data shifts out on falling edge and shifts in on rising edge. Data is
0: Disable SPI mode
1: Enable SPI mode
0: No overflow
SPI Shift Enable bit
0: After Serial data output, the SDO remains high
1: After Serial data output, the SDO remains low
1: A new data is received while the previous data is still being held in
0: Reset as soon as shifting is completed and the next byte is ready to
1: Start to shift and keep at “1” while the current byte is being
0
0
1
1
0
0
1
1
on hold during low-level.
on hold during high-level.
the SPIR register. Under this condition, the data in the SPI Shift
register will be destroyed. To avoid setting this bit, users are
required to read the SPIR register although only transmission is
implemented. This can only occur in Slave mode.
shift.
transmitted.
SBRS0
Bit 5
SRO
0
1
0
1
0
1
0
1
Bit 4
SSE
(This specification is subject to change without further notice)
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
SDOC
Bit 3
Product Specification (V1.0) 05.05.2010
SBRS2
Bit 2
SPI Baud Rate
/SS enable
/SS disable
Fosc/2
Fosc/4
Fosc/8
Fosc/16
Fosc/32
Fosc/64
SBRS1
Bit 1
SBRS0
Bit 0

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