em78f644nso28s ELAN Microelectronics Corp, em78f644nso28s Datasheet - Page 156

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em78f644nso28s

Manufacturer Part Number
em78f644nso28s
Description
Flash Series 8-bit Microcontroller
Manufacturer
ELAN Microelectronics Corp
Datasheet
EM78F648/644/642/641/548/544/542/541N
8-Bit Microcontroller
146 •
Internal /
External
External
External
External
External
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Interrupt Source
Reset
INT
Port 6 pin change
TCC
LVD
Comparator1
SPI
Comparator2
TC1
UART Transmit
UART Receive
UART Receive error
TC2
TC3
PWMA
PWMB
I2C Transmit
I2C Receive
I2C Stop
6.12.2 Interrupt for EM78F648/548N
Bank0 RC~RF are the Interrupt Status registers that record the interrupt requests in
the relative flags/bits. Bank0 R1C~R1F is the Interrupt Mask register. The global
interrupt is enabled by the ENI instruction and is disabled by the DISI instruction.
When one of the interrupts (enabled) occurs, the next instruction will be fetched from
their individual address. The interrupt flag bit must be cleared by instructions before
leaving the interrupt service routine and before interrupts are enabled to avoid
recursive interrupts.
The flag (except ICIF bit delete) in the Interrupt Status Register is set regardless of
the status of its mask bit or the execution of ENI. The RETI instruction ends the
interrupt routine and enables the global interrupt (the execution of ENI).
The External interrupt is equipped with digital noise rejection circuit (input pulse of
less than 8 system clocks time is eliminated as noise), but in Low XTAL oscillator
(LXT) mode the noise rejection circuit is disabled. When an interrupt (Falling
edge) is generated by the External interrupt (when enabled), the next instruction will
be fetched from Address 003H.
Before the interrupt subroutine is executed, the contents of ACC and the R3 & R4
registers are saved by hardware. If another interrupt occurs, the ACC, R3 and R4 will
be replaced by the new interrupt. After the interrupt service routine is completed,
ACC, R3, and R4 will be pushed back.
The EM78F648/548N has 18 interrupts (4 external, 14 internal) listed below:
Enable Condition
-
ENI + EXIE=1
ENI +ICIE=1
ENI + TCIE=1
ENI+LVDEN &
LVDIE=1
ENI+CMP1IE=1
ENI + SPIIE=1
ENI+CMP2IE=1
ENI + TC1IE=1
ENI + UTIE=1
ENI + URIE=1
ENI+UERRIE=1
ENI + TC2IE=1
ENI + TC3IE=1
ENI+PWMAIE=1
ENI+PWMBIE=1
ENI+ I2CTIE
ENI+ I2CRIE
ENI+ I2CSTPIE
(This specification is subject to change without further notice)
Product Specification (V1.0) 05.05.2010
-
EXIF
ICIF
TCIF
LVDIF
CMP1IF
SPIIF
CMP2IF
TC1IF
TBEF
RBFF
UERRIF
TC2IF
TC3IF
PWMAIF
PWMBIF
I2CTIF
I2CRIF
I2CSTPIF
Int. Flag
Int. Vector
000C
001B
001E
002A
002D
0000
0003
0006
0009
000F
0012
0015
0018
0021
0024
0027
0036
0039
003F
Priority
High 0
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9

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