em78f644nso28s ELAN Microelectronics Corp, em78f644nso28s Datasheet - Page 118

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em78f644nso28s

Manufacturer Part Number
em78f644nso28s
Description
Flash Series 8-bit Microcontroller
Manufacturer
ELAN Microelectronics Corp
Datasheet
EM78F648/644/642/641/548/544/542/541N
8-Bit Microcontroller
108 •
6.8.1 7-Bit Slave Address
Master-transmitter transmits to Slave-receiver. The transfer direction is not changed.
Master reads Slave immediately after the first byte. At the moment of the first
acknowledge, the Master-transmitter becomes a Master-receiver and the Slave-
receiver becomes a Slave-transmitter. This first acknowledge is still generated by the
Slave. The STOP condition is generated by the Master, which has previously sent a
not-acknowledge (A). The difference between Master-transmitter and Master-
receiver is only with their in R//W bit. If the R//W bit is “0”, the Master device
becomes a transmitter. Otherwise, the Master device turns to be a receiver (R//W bit
is “1”). The Master-transmitter operation is illustrated in Figure 6-19a, and that of
Master-receiver is shown in “Figure 6-19b below.
6.8.2 10-Bit Slave Address:
In 10-bit Slave Address mode, using 10-bit for addressing exploits the reserved
combination 11110XX for the first 7 bits of the first byte following a START (S) or
repeated START (Sr) condition. The first 7 bits of the first byte are the combination
11110XX of which the last 2 bits (XX) are the two most-significant bits of the 10-bit
address. If the R//W bit were “0”, the second byte after acknowledge would be the 8
address bits of the10-bit Slave address. Otherwise, the second byte would just be
the next transmitted data from a Slave to Master device. The first bytes 11110XX are
transmitted using the Slave address register (I2CSA), and the second bytes
XXXXXXXX are transmitted using the data buffer (I2CDB).
Figure 6-19a Master-Transmitter Transmits to Slave-Receiver with 7-Bit Slave Address
Figure 6-19b Master-Receiver Reads from Slave-Transmitter with 7-Bit Slave Address
S
Slave Address
7 Bits
8 Bits
'1' Read
R//W
(This specification is subject to change without further notice)
A
Data
(n byte + acknowledge)
Product Specification (V1.0) 05.05.2010
data transferred
A
Data
/A
P

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