HEF4093BT,652 NXP Semiconductors, HEF4093BT,652 Datasheet - Page 5

• Manufacturer Part Number: HEF4093BT,652
• Description: IC SCHM TRIG NAND QD 2IN 14SOIC
• Manufacturer: NXP Semiconductors
• Series: 4000Br

Specifications of HEF4093BT,652

• Number Of Circuits: 4
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Logic Type: NAND Gate - Schmitt Trigger
• Number Of Inputs: 2
• Current - Output High, Low: 4.2mA, 4.2mA
• Voltage - Supply: 3 V ~ 15 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Product: NAND
• Logic Family: HEF4000
• High Level Output Current: - 4.2 mA
• Low Level Output Current: 4.2 mA
• Propagation Delay Time: 30 ns
• Supply Voltage (max): 15.5 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Logical Function: NAND
• Number Of Elements: 4
• Operating Supply Voltage (typ): 3.3/5/9/12V
• Operating Temp Range: -40C to 125C
• Package Type: SO
• Number Of Outputs: 1
• Technology: CMOS
• Mounting: Surface Mount
• Pin Count: 14
• Operating Temperature Classification: Automotive
• Quiescent Current: 1uA
• Operating Supply Voltage (max): 15V
• Operating Supply Voltage (min): 3V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 933373130652; HEF4093BTD; HEF4093BTD

NXP Semiconductors
11. Dynamic characteristics
Table 7.
T
[1]
Table 8.
V
HEF4093B
Product data sheet
Symbol Parameter
t
t
t
t
Symbol Parameter
P
PHL
PLH
THL
TLH
amb
SS
D
= 0 V; t
Typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (C
= 25 °C; C
HIGH to LOW
propagation delay
LOW to HIGH
propagation delay
HIGH to LOW output
transition time
LOW to HIGH output
transition time
dynamic power
dissipation
r
Dynamic characteristics
Dynamic power dissipation
= t
f
L
≤ 20 ns; T
= 50 pF; t
amb
r
= t
= 25 °C.
f
≤ 20 ns; wave forms see
V
10 V
15 V
5 V
DD
Conditions
nA or nB to nY
nA or nB to nY
nY to LOW
nA or nB to
HIGH
Typical formula
P
P
P
All information provided in this document is subject to legal disclaimers.
D
D
D
= 1300 × f
= 6400 × f
= 18700 × f
Rev. 7 — 1 September 2010
V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
5 V
5 V
5 V
5 V
DD
i
i
+ Σ(f
+ Σ(f
i
Figure
+ Σ(f
o
o
o
× C
× C
× C
4; test circuit see
Extrapolation formula
63 ns + (0.55 ns/pF)C
29 ns + (0.23 ns/pF)C
22 ns + (0.16 ns/pF)C
58 ns + (0.55 ns/pF)C
29 ns + (0.23 ns/pF)C
22 ns + (0.16 ns/pF)C
10 ns + (1.00 ns/pF)C
10 ns + (1.00 ns/pF)C
9 ns + (0.42 ns/pF)C
6 ns + (0.28 ns/pF)C
9 ns + (0.42 ns/pF)C
6 ns + (0.28 ns/pF)C
L
L
) × V
) × V
L
) × V
DD
DD
DD
2
2
2
(μW)
(μW)
(μW)
Figure
Quad 2-input NAND Schmitt trigger
where:
f
f
C
Σ(f
V
L
L
L
L
L
L
L
L
L
L
L
L
i
o
DD
= input frequency in MHz;
L
[1]
= output frequency in MHz;
o
5; unless otherwise specified.
= output load capacitance in pF;
× C
= supply voltage in V.
Min
-
-
-
-
-
-
-
-
-
-
-
-
L
) = sum of the outputs;
HEF4093B
Typ
90
40
30
85
40
30
60
30
20
60
30
20
© NXP B.V. 2010. All rights reserved.
L
in pF).
Max
185
170
120
120
80
60
80
60
60
40
60
40
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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