LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 106

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LSI53C875

Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet

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Table 4.8
4-14
Name
PERR/
SERR/
LSI53C875JB
LSI53C875N,
LSI53C875J,
LSI53C875,
143/186/E7
24/30/H2
Pin No.
Error Reporting Signals
Table 4.8
Signal Descriptions
S/T/S Parity Error may be pulsed active by an agent that detects a data
Type
O
describes the Error Reporting Signals group.
Description
parity error. PERR/ can be used by any agent to signal data
corruptions.
System Error is an open drain output used to report address parity
errors. On detection of a PERR/ pulse, the central resource
generates a nonmaskable interrupt to the host CPU, which often
implies the system is unable to continue operation once error
processing completes.

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