LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 130

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

5-14
Register: 0x04 (0x84)
SCSI Chip ID (SCID)
Read/Write
R
RRE
SRE
R
ENC[3:0]
SCSI Operating Registers
R
7
x
RRE
6
0
If the SCSI clock doubler is enabled, use the desired
frequency after doubling to determine the conversion
factor.
Reserved
Enable Response to Reselection
When this bit is set, the LSI53C875 is enabled to respond
to bus-initiated reselection at the chip ID in the
ID Zero (RESPID0)
registers. Note that the chip does not automatically
reconfigure itself to initiator mode as a result of being
reselected.
Enable Response to Selection
When this bit is set, the LSI53C875 is able to respond to
bus-initiated selection at the chip ID in the
Zero (RESPID0)
registers. Note that the chip does not automatically
reconfigure itself to target mode as a result of being
selected.
Reserved
Encoded Chip SCSI ID
These bits are used to store the LSI53C875 encoded
SCSI ID. This is the ID which the chip asserts when
arbitrating for the SCSI bus. The IDs that the LSI3C875
responds to when being selected or reselected are
configured in the
Response ID One (RESPID1)
the 16 possible IDs, in descending order is:
7
6
SRE
5
0
5
Highest
4
3
R
4
x
2
and
Response ID Zero (RESPID0)
and
1
Response ID One (RESPID1)
0
3
0
Response ID One (RESPID1)
15
registers. The priority of
14
0
13
ENC
Lowest
12
0
Response ID
11
Response
10
and
9
0
0
[3:0]
8
7
6
5
4