AD8400AN10 Analog Devices, AD8400AN10 Datasheet - Page 5

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AD8400AN10

Manufacturer Part Number
AD8400AN10
Description
1-/2-/4-Channel Digital Potentiometers
Manufacturer
Analog Devices
Datasheet
AD8400/AD8402/AD8403–SPECIFICATIONS
All VERSIONS
ELECTRICAL CHARACTERISTICS
Parameter
SWITCHING CHARACTERISTICS
NOTES
1
2
3
4
Specifications subject to change without notice.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8400/AD8402/AD8403 feature proprietary ESD protection circuitry, perma-
nent damage may occur on devices subjected to high energy electrostatic discharges. Therefore,
proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Typicals represent average readings at +25 C and V
Guaranteed by design and not subject to production test. Resistor-terminal capacitance tests are measured with 2.5 V bias on the measured terminal. The remaining
See timing diagram for location of measured values. All input control voltages are specified with t
Propagation Delay depends on value of V
resistor terminals are left open circuit.
of 1.6 V. Switching characteristics are measured using V
V
(DATA OUT)
CLK
SDI
OUT
Input Clock Pulse Width
Data Setup Time
Data Hold Time
CLK to SDO Propagation Delay
CS Setup Time
CS High Pulse Width
Reset Pulse Width
CLK Fall to CS Rise Hold Time
CS Rise to Clock Rise Setup
CS
(DATA IN)
V
0V
DD
V
SDO
CLK
1
0
1
0
1
0
SDI
OUT
CS
V
0V
DD
1
0
1
0
1
0
1
0
A1
Figure 1b. Detail Timing Diagram
A0
Ax OR Dx
A'x OR D'x
Figure 1a. Timing Diagram
t
D7
PD_MIN
t
CSS
D6
t
CH
D5
A'x OR D'x
Ax OR Dx
t
DS
D4
t
CL
DAC REGISTER LOAD
4
D3
DD
, R
t
2, 3
DH
D2
L
and C
D1
t
CSH
DD
1 % ERROR BAND
D0
Symbol
t
t
t
t
t
t
t
t
t
L
= +5 V.
CH
DS
DH
PD
CSS
CSW
RS
CSH
CS1
–see applications text.
DD
t
PD_MAX
t
, t
CS1
= +3 V or +5 V. To avoid false clocking a minimum input logic slew rate of 1 V/ s should be maintained.
(V
otherwise noted)
CL
t
DD
S
t
CSW
= +3 V
Conditions
Clock Level High or Low
R
1 %
L
= 1 k to +5 V, C
10% or + 5 V
–5–
ABSOLUTE MAXIMUM RATINGS*
(T
V
V
A
Digital Input and Output Voltage to GND . . . . . . . 0 V, +8 V
Operating Temperature Range . . . . . . . . . . . . –40 C to +85 C
Maximum Junction Temperature (T
Storage Temperature . . . . . . . . . . . . . . . . . . –65 C to +150 C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300 C
Package Power Dissipation . . . . . . . . . . . . . . (T
Thermal Resistance
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
DD
A
X
A
P-DIP (N-14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +83 C/W
P-DIP (N-24) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +63 C/W
SOIC (SO-14) . . . . . . . . . . . . . . . . . . . . . . . . . . . +70 C/W
SOIC (SOL-24) . . . . . . . . . . . . . . . . . . . . . . . . . +120 C/W
TSSOP-14 (RU-14) . . . . . . . . . . . . . . . . . . . . . . +180 C/W
TSSOP-24 (RU-24) . . . . . . . . . . . . . . . . . . . . . . +143 C/W
, V
–B
= +25 C, unless otherwise noted)
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +8 V
B
X
, V
, A
R
10%, V
W
X
= t
L
–W
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, V
F
V
20 pF
Figure 1c. Reset Timing Diagram
= 1 ns (10% to 90% of V
X
OUT
, B
A
RS
V
= +V
DD
X
V
DD
–W
/2
1
0
DD
JA
X
, V
)
B
. . . . . . . . . . . . . . . . . . . . . .
= 0 V, –40 C T
1% ERROR BAND
Min
10
5
5
1
10
10
50
0
10
t
RS
DD
WARNING!
t
S
) and timed from a voltage level
J
max) . . . . . . . . . +150 C
Typ
A
1
ESD SENSITIVE DEVICE
+85 C unless
1%
Max
25
J
max–T
REV. B
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
20 mA
A
)/
DD
JA

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