LTC4266 LINER [Linear Technology], LTC4266 Datasheet - Page 17

• Manufacturer Part Number: LTC4266
• Description: Quad IEEE 802.3at Power over Ethernet Controller
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
accept or reject resistances in the undefined areas between
the must-accept and must-reject ranges. In particular, the
PSE must reject standard computer network ports, many
of which have 150Ω common mode termination resistors
that will be damaged if power is applied to them (the black
region at the left of Figure 11).
4-Point Detection
The LTC4266 uses a 4-point detection method to discover
PDs. False-positive detections are minimized by check-
ing for signature resistance with both forced-current and
forced-voltage measurements. Initially, two test currents
are forced onto the port (via the OUTn pin) and the resulting
voltages are measured. The detection circuitry subtracts
the two V-I points to determine the resistive slope while
removing offset caused by series diodes or leakage at
the port (see Figure 12). If the forced-current detection
yields a valid signature resistance, two test voltages are
then forced onto the port and the resulting currents are
measured and subtracted. Both methods must report
valid resistances for the port to report a valid detection.
PD signature resistances between 17k and 29k (typically)
are detected as valid and reported as Detect Good in the
corresponding Port Status register. Values outside this
range, including open and short circuits, are also reported.
If the port measures less than 1V at the first forced-current
test, the detection cycle will abort and Short Circuit will
be reported. Table 3 shows the possible detection results.
Table 3. Detection Status
MEASURED PD SIGNATURE
Incomplete or Not Yet Tested
<2.4k
Capacitance > 2.7µF
2.4k < R
17k < R
>29k
>50k
Voltage > 10V
RESISTANCE
Figure 11. IEEE 802.3af Signature Resistance Ranges
PD
PSE
PD
PD
< 29k
< 17k
0
150 (NIC)
10k
DETECTION RESULT
Detect Status Unknown
Short Circuit
C
R
Detect Good
R
Open Circuit
Port Voltage Outside Detect Range
15k
PD
SIG
SIG
too High
too Low
too High
20k
19k
23.75k
26.25k
26.5k
30k
33k
4266 F11
Operating Modes
The port’s operating mode determines when the LTC4266
runs a detection cycle. In manual mode, the port will
idle until the host orders a detect cycle. It will then run
detection, report the results, and return to idle to wait for
another command.
In semi-auto mode, the LTC4266 autonomously polls a port
for PDs, but it will not apply power until commanded to do
so by the host. The Port Status register is updated at the
end of each detection cycle. If a valid signature resistance
is detected and classification is enabled, the port will clas-
sify the PD and report that result as well. The port will then
wait for at least 100ms (or 2 seconds if midspan mode is
enabled), and will repeat the detection cycle to ensure that
the data in the port status register is up-to-date.
If the port is in semi-auto mode and high power opera-
tion is enabled, the port will not turn on in response to
a power-on command unless the current detect result is
Detect Good. Any other detect result will generate a t
fault if a power-on command is received. If the port is not
in high power mode, it will ignore the detection result and
apply power when commanded, maintaining backwards
compatibility with the LTC4259A.
Behavior in AUTO pin mode is similar to semi-auto; however,
after Detect Good is reported and the port is classified (if
classification is enabled), it is automatically powered on
without further intervention. In AUTO pin mode, the I
and I
and the AUTO/MID Pins section for more information.
LIM
thresholds are automatically set; see the Reset
275
165
OFFSET
0V-2V
Figure 12. PD Detection
VALID PD
VOLTAGE
25k SLOPE
DETECTION
SECOND
POINT
DETECTION
POINT
LTC4266
FIRST
4266 F12
17
START
4266fb
CUT