LTC4266 LINER [Linear Technology], LTC4266 Datasheet - Page 27

• Manufacturer Part Number: LTC4266
• Description: Quad IEEE 802.3at Power over Ethernet Controller
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
PACKAGE DESCRIPTION
(.0091 – .0125)
0.231 – 0.3175
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
KELVIN SENSE TRACE CONNECTS U1
TO V
PIN 1
0.520 ±0.0635
EE
10.804 MIN
RECOMMENDED SOLDER PAD LAYOUT
THROUGH THE VIAS ON THE RIGHT
U1
36
1
0.254 – 0.406
(.010 – .016)
MILLIMETERS
THE PADDLE IS
CONNECTED TO
V
7.417 – 7.595**
(.292 – .299)
(INCHES)
EE
PINS
(.015 – .050)
0.40 – 1.27
× 45°
19
7.75 – 8.258
18
1.40 ±0.127
Figure 21. Good PCB Layout Example
0.800 BSC
**
*
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.152mm (0.006") PER SIDE
0.355
36-Lead Plastic SSOP (Wide .300 Inch)
REF
0° – 8° TYP
(Reference LTC DWG # 05-08-1642)
PORT A R
PORT C R
SENSE
SENSE
GW Package
(.096 – .104)
2.44 – 2.64
(.0315)
0.800
BSC
EDGE OF V
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
PORT B R
PORT D R
EE
PLANE (ON SOME INNER LAYER)
SENSE
SENSE
15.291 – 15.545*
(.602 – .612)
(.011 – .02)
0.28 – 0.51
FOUR LARGE VIAS
TO V
HOLE IN V
VIAS TO SOURCE PIN OF
THE PORT D MOSFET
LOCATED ON THE OPPOSITE
SIDE OF THE BOARD
TYP
EE
PLANE
EE
PLANE
4266 F21
(.004 – .0118)
2.286 – 2.388
0.1 – 0.3
(.090 – .094)
GW36 SSOP 0204
LTC4266
10.11 – 10.55
(.398 – .415)
27
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