HEF4094BTS NXP [NXP Semiconductors], HEF4094BTS Datasheet - Page 4

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HEF4094BTS

Manufacturer Part Number
HEF4094BTS
Description
8-stage shift-and-store bus register
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
Table 3.
[1]
7. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V
[1]
[2]
HEF4094B_4
Product data sheet
Inputs
CP
Symbol
V
I
V
I
I
I
T
T
P
P
IK
OK
I/O
DD
Fig 5.
DD
I
stg
amb
tot
At the positive clock edge, the information in the 7th register stage is transferred to the 8th register stage and the QSn outputs.
H = HIGH voltage level; L = LOW voltage level; X = don’t care;
Z = HIGH-impedance OFF-state; NC = no change;
Q6S = the data in register stage 6 before the LOW to HIGH clock transition;
Q7S = the data in register stage 7 before the HIGH to LOW clock transition.
For DIP16 packages: above T
For SO16 packages: above T
= positive-going transition;
Timing diagram
Parameter
supply voltage
input clamping current
input voltage
output clamping current
input/output current
supply current
storage temperature
ambient temperature
total power dissipation
power dissipation
Function table
Limiting values
OE
H
OUTPUT ENABLE INPUT
INTERNAL Q0S (FF 0)
INTERNAL Q6S (FF 6)
SERIAL OUTPUT QS1
SERIAL OUTPUT QS2
STROBE INPUT
CLOCK INPUT
OUTPUT QP0
OUTPUT QP6
DATA INPUT
[1]
…continued
amb
amb
STR
H
= negative-going transition;
= 70 C, P
= 70 C, P
tot
tot
derates linearly with 8 mW/K.
derates linearly with 12 mW/K.
D
H
Rev. 04 — 30 October 2008
Conditions
V
V
DIP16
SO16
per output
I
O
< 0.5 V or V
< 0.5 V or V
Parallel outputs
QP0
NC
I
O
> V
> V
DD
DD
+ 0.5 V
+ 0.5 V
Z-state
Z-state
QPn
NC
8-stage shift-and-store bus register
[1]
[2]
Min
-
-
-
-
-
-
-
0.5
0.5
65
40
Serial outputs
QS1
NC
HEF4094B
SS
001aaf117
Max
V
+150
+125
= 0 V (ground).
+18
750
500
100
DD
© NXP B.V. 2008. All rights reserved.
10
10
10
50
+ 0.5
QS2
Q7S
Unit
V
mA
V
mA
mA
mA
mW
mW
mW
C
C
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