PCM1738E2K BURR-BROWN [Burr-Brown Corporation], PCM1738E2K Datasheet
PCM1738E2K
Related parts for PCM1738E2K
PCM1738E2K Summary of contents
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Sampling, Advanced Segment, Audio-Stereo DIGITAL-TO-ANALOG CONVERTER FEATURES 24-BIT RESOLUTION ANALOG PERFORMANCE (V CC Dynamic Range: 117dB typ SNR: 117dB typ THD+N: 0.0004% typ Full-Scale Output: 2.2Vrms (at post amp) DIFFERENTIAL CURRENT OUTPUT: 2.48mA SAMPLING FREQUENCY: 10kHz to ...
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SPECIFICATIONS All specifications + +3.3V PARAMETER RESOLUTION DATA FORMAT Audio Data Interface Formats Audio Data Bit Length Audio Data Format Sampling Frequency ( System Clock Frequency DIGITAL INPUT/OUTPUT ...
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SPECIFICATIONS (Cont.) All specifications + +3.3V PARAMETER POWER SUPPLY REQUIREMENTS Voltage Range (4) Supply Current Power Dissipation TEMPERATURE RANGE Operation Temperature Thermal ...
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BLOCK DIAGRAM LRCK Input DATA I/F BCK Oversampling RST MUTE Function CS Control MC MDI I/F MDO System Clock System Clock ZERO Detect SCKI Manager PIN CONFIGURATION TOP VIEW RST 1 2 ZEROL 3 ZEROR LRCK 4 DATA 5 BCK ...
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TYPICAL PERFORMANCE CURVES All specifications + +3.3V DIGITAL FILTER Digital Filter (De-Emphasis Off, f FREQUENCY RESPONSE (Sharp Roll-Off) 0 –20 –40 –60 –80 –100 –120 –140 –160 ...
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TYPICAL PERFORMANCE CURVES All specifications + +3.3V De-Emphasis Error (Cont.) DE-EMPHASIS (f = 44.1kHz) S 0.0 –1.0 –2.0 –3.0 –4.0 –5.0 –6.0 –7.0 –8.0 –9.0 –10 ...
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TYPICAL PERFORMANCE CURVES All specifications + +3.3V Analog Dynamic Performance (Cont.) DYNAMIC RANGE vs V 120 119 118 117 116 115 114 113 112 4.50 4.75 5.00 V (V) CC ...
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TYPICAL PERFORMANCE CURVES All specifications + +3.3V Analog Dynamic Performance (Cont.) –60dB OUTPUT SPECTRUM (BW = 20kHz) 0 –20 –40 –60 –80 –100 –120 –140 –160 0 5k 10k Frequency ...
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ANALOG FIR FILTER PERFORMANCE FOR DSD MODE All specifications + +3.3V DSD FILTER 1 0 –1 –2 –3 –4 –5 – 100 Frequency (kHz) DSD FILTER 2 0 ...
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ANALOG FIR FILTER PERFORMANCE FOR DSD MODE All specifications + +3.3V DSD FILTER 4 0 –1 –2 –3 –4 –5 – 100 Frequency (kHz +5V, SCKI ...
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SYSTEM CLOCK AND RESET FUNCTIONS SYSTEM CLOCK INPUT The PCM1738 requires a system clock for operating the digital interpolation filters and advanced segment DAC modulators. The system clock is applied at the SCKI input (pin 7). The PCM1738 has a ...
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V 2.0V/typ DD 1.6V/min Internal Reset System Clock FIGURE 2. Power-On Reset Timing. RST (pin 1) Internal Reset System Clock FIGURE 3. Audio Data Input Formats. AUDIO DATA INTERFACE AUDIO SERIAL INTERFACE The audio serial interface for the PCM1738 ...
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Standard Data Format (Right Justified): L-Channel = HIGH, R-Channel = LOW LRCK BCK Audio Data Word = 16 Bit DATA Audio Data Word = 20 Bit DATA Audio Data Word = 24 Bit ...
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LRCK t BCH BCK t BCY DATA SYMBOL t BCY t BCL t BCH LRCK Falling Edge to BCK Rising Edge --- FIGURE 5. Audio Interface Timing MDI W/R MDO ...
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FUNCTIONAL DESCRIPTIONS ZERO DETECT When the PCM1738 detects that the audio input data in the L-channel or R-channel is continuously zero for 1024f PCM1738 sets ZEROL (pin 2) or ZEROR (pin 3) to HIGH. Setting the INZD bit of mode ...
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MODE CONTROL REGISTERS User-Programmable Mode Controls The PCM1738 includes a number of user-programmable functions that are accessed via mode control registers. The registers are programmed using the Serial Control Interface that was previously discussed in this data sheet. Table II ...
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REGISTER DEFINITIONS B15 B14 B13 B12 REGISTER 16 W REGISTER 17 W W/R Read/Write Mode Select When W Write operation is performed. When W Read operation is performed. Default Value: ...
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REGISTER 18 (Cont.) FMT[2:0] Audio Interface Data Format These bits are Read/Write. Default Value: 000 For external Digital-Filter Interface Mode (DFTH Mode), this register is operated as shown in the External Digital-Filter Mode section of this data sheet. The FMT[2:0] ...
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B15 B14 B13 B12 REGISTER 19 W W/R Read/Write Mode Control When W Write operation is performed. When W Read operation is performed. Default Value: 0 REV Output Phase Reversal This bit ...
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REGISTER 19 (Cont.) FLT Digital Filter Roll-Off Control This bit is Read/Write. Default Value: 0 FLT = 0 Sharp Roll-Off (default) FLT = 1 Slow Roll-Off The FLT bit allows the user to select the digital filter roll-off characteristics. The ...
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REGISTER 20 (Cont.) DFTH Digital Filter Bypass (or Through Mode) Control This bit is Read/Write. Default Value: 0 DFTH = 0 Digital Filter Enabled (default) DFTH = 1 Digital Filter Bypassed for Either External Digital Filter or DSD Mode The ...
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B15 B14 B13 B12 REGISTER 21 W W/R Read/Write Mode Control Only available to set 0 for Read back mode. ZFGx Zero Detection Flag When corresponding to the DAC output channel. These bits ...
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ANALOG OUTPUTS +5.0V PCM1738E 0 AGND2 I L– 26 OUT OUT ...
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APPLICATION FOR EXTERNAL DIGITAL FILTER INTERFACE WDCK (Word Clock) DATA-L BCK SCK DF1704 DF1706 PMD200 Control DATA-R FIGURE 10. Connection Diagram for External Digital Filter (Internal DF Bypass Mode) Application. APPLICATIONS FOR INTERFACING WITH THE EXTERNAL DIGITAL FILTER PART For ...
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FUNCTIONS AVAILABLE IN THE EXTERNAL DIGITAL-FILTER MODE The external Digital-Filter mode allows access to the majority of the PCM1738’s mode control functions. Table IV shows the register mapping available when the external Digital-Filter mode is selected, along with descriptions of ...
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APPLICATION FOR DSD FORMAT (DSD MODE) INTERFACE Always Set LOW DATA-L Always Set LOW Bit Clock (n • DSD Decoder Mode Control DATA-R FIGURE 11. Connection Diagram for DSD Format Interface. FEATURES This mode is utilized for ...
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DSD MODE CONFIGURATION AND FUNCTION CONTROLS Configuration for DSD Interface mode: • DFTH = 1 (Register 20) • DME = 1 (Register 18) Table V shows the register mapping available in DSD Mode. REGISTER B15 B14 B13 B12 16 W/R ...
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APPLICATION FOR MONAURAL MODE OPERATION Single-channel signals within stereo-audio data input is output to both I L and differential outputs. OUT OUT Selection of channels to output is available with the CHSL bit in Register 20. Applications, ...
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THEORY OF OPERATION ADVANCED SEGMENT DAC Upper 6 Bits Digital Input 24-Bit 8f S MSB and Lower 18 Bits FIGURE 13. Architecture of Advanced Segment DAC. The PCM1738 utilizes the newly developed Advanced Seg- ment DAC architecture to achieve excellent ...
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CONSIDERATIONS FOR APPLICATIONS CIRCUITS PCB LAYOUT GUIDELINES A typical PCB floor plan for the PCM1738 is shown in Figure 14. A ground plane is recommended, with the analog and digital sections being isolated from one another using a split or ...
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WDCK BCK Audio Data Word = 16 Bit DATAL 15 16 DATAR Audio Data Word = 20 Bit DATAL 19 20 DATAR Audio Data Word = 24 Bit DATAL 23 24 DATAR FIGURE 16. Audio Data Input Format for External ...
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PACKAGING INFORMATION (1) Orderable Device Status PCM1738E ACTIVE PCM1738E/2K ACTIVE (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy ...
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Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the ...