PCM1738E2K BURR-BROWN [Burr-Brown Corporation], PCM1738E2K Datasheet - Page 12

• Manufacturer Part Number: PCM1738E2K
• Description: 24-Bit, 192kHz Sampling, Advanced Segment, Audio-Stereo DIGITAL-TO-ANALOG CONVERTER
• Manufacturer: BURR-BROWN [Burr-Brown Corporation]

12
FIGURE 3. Audio Data Input Formats.
AUDIO DATA INTERFACE
AUDIO SERIAL INTERFACE
The audio serial interface for the PCM1738 is comprised of
a 3-wire synchronous serial port. It includes LRCK (pin 4),
BCK (pin 6), and DATA (pin 5). BCK is the serial audio bit
clock, used to clock the serial data present on DATA into the
audio interface’s serial shift register. Serial data is clocked
into the PCM1738 on the rising edge of BCK. LRCK is the
serial audio left/right word clock, used to latch serial data
into the serial audio interface’s internal registers.
LRCK should be synchronous to the system clock. In the
event these clocks are not synchronized, the PCM1738 can
compensate for the phase difference internally. If the phase
difference between LRCK and SCKI is greater than six bit
clocks (BCK), the synchronization is performed internally.
While the synchronization is processing, the analog output is
FIGURE 2. Power-On Reset Timing.
V
Internal Reset
System Clock
System Clock
DD
Internal Reset
RST (pin 1)
2.4V/max
1.6V/min
2.0V/typ
Reset Pulse Width LOW
t
RST
1024 System Clock Periods
1024 System Clocks
Reset
Reset
forced to the bipolar zero level. The synchronization typi-
cally occurs in less than one cycle of LRCK.
Ideally, it is recommended that LRCK and BCK be derived
from the system clock input or output, SCKI or SCKO. The
left/right clock (LRCK) is operated at the sampling fre-
quency, f
AUDIO DATA FORMATS AND TIMING
The PCM1738 supports industry-standard audio data formats,
including Standard Right-Justified, I
data formats are shown in Figure 4. Data formats are selected
using the format bits, FMT [2:0], in Control Register 18. The
default data format is 16-bit Standard. All formats require
Binary Two’s Complement, MSB-first audio data. Figure 5
shows a detailed timing diagram for the serial audio interface.
t
RST
S
20ns (min)
50% of V
.
DD
Reset Removal
Reset Removal
2
S, and Left-Justified. The
PCM1738
SBAS174B