PCM1738E2K BURR-BROWN [Burr-Brown Corporation], PCM1738E2K Datasheet - Page 14

• Manufacturer Part Number: PCM1738E2K
• Description: 24-Bit, 192kHz Sampling, Advanced Segment, Audio-Stereo DIGITAL-TO-ANALOG CONVERTER
• Manufacturer: BURR-BROWN [Burr-Brown Corporation]

14
EXTERNAL DIGITAL FILTER
INTERFACE AND TIMING
The PCM1738 supports an external digital-filter interface
comprised of a 4-wire synchronous serial port that allows
the use of an external digital filter. External filters include
the DF1704 and DF1706 from Texas Instruments, the
Pacific Microsonics PMD200, or a programmable digital
signal processor.
The 4-wire interface includes WCK as the word clock, BCK as
the bit clock, DATAL as the L-channel data, and DATAR as
the R-channel data. The external digital-filter interface is se-
lected using the DFTH bit of Control Register 20, which
functions to bypass the internal digital-filter portion of the
PCM1738. The 4-wire serial port is assigned to WDCK (pin 4),
BCK (pin 6), DATAL (pin 5), and DATAR (pin 15).
FIGURE 5. Audio Interface Timing.
FIGURE 6. Serial Control Format.
NOTE: B15 is used for the selection of Write or Read. Setting W/R = 0 indicates a Write, while W/R = 1 indicates a Read.
B14 to B8 are used for register address.
B7 to B0 are used for register data.
LRCK
DATA
BCK
MDO
MDI
MC
CS
SYMBOL
t
t
t
t
t
t
t
---
BCY
BCL
BCH
BL
LB
DS
DH
t
BCH
W/R
LRCK Falling Edge to BCK Rising Edge
t
BCY
BCK Rising Edge to LRCK Edge
A6
high impedance
BCK Pulse Cycle Time
A5
BCK High Level Time
BCK Low Level Time
DATA Set Up Time
t
LRCK Clock Duty
BCL
DATA Hold Time
PARAMETER
t
A4
DS
A3
A2
t
t
BL
DH
A1
A0
DSD (DIRECT STREAM DIGITAL) FORMAT
INTERFACE AND TIMING
The PCM1738 supports a DSD format interface operation
that includes out-of-band noise filtering using an internal
Analog FIR filter. For DSD operation, pin 7 is redefined as
BCK, which operates at 64 x 44.1kHz; pin 5 is redefined as
DATAL (left-channel audio data), and pin 15 becomes
DATAR (right-channel audio data). Pins 4 and 6 must be
forced LOW in DSD mode. This configuration allows for
direct interface to a DSD decoder for SACD applications.
Detailed information for the DSD mode is provided in the
DSD Mode Operation section of this data sheet.
D7
D7
When Read mode is instructed
D6
D6
MIN
50%
70
30
30
10
10
10
10
D5
D5
t
LB
2-Bit Clock
D4
D4
UNITS
D3
D3
ns
ns
ns
ns
ns
ns
ns
D2
D2
D1
D1
D0
D0
50% of V
50% of V
50% of V
PCM1738
DD
DD
DD
SBAS174B