X9429 INTERSIL [Intersil Corporation], X9429 Datasheet

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X9429

Manufacturer Part Number
X9429
Description
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet

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Single Digitally Controlled Potentiometer
(XDCP™)
The X9429 integrates a single digitally controlled
potentiometer (XDCP) on a monolithic CMOS integrated
circuit.
The digital controlled potentiometer is implemented using 63
resistive elements in a series array. Between each element
are tap points connected to the wiper terminal through
switches. The position of the wiper on the array is controlled
by the user through the 2-wire bus interface. The
potentiometer has associated with it a volatile Wiper Counter
Register (WCR) and a four non-volatile Data Registers that
can be directly written to and read by the user. The contents
of the WCR controls the position of the wiper on the resistor
array though the switches. Power-up recalls the contents of
the default data register (DR0) to the WCR.
The XDCP can be used as a three-terminal potentiometer or
as a two terminal variable resistor in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Block Diagram
INTERFACE
2-WIRE
BUS
®
ADDRESS
STATUS
DATA
1
Data Sheet
INTERFACE
CONTROL
AND
V
BUS
V
CC
SS
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2008. All Rights Reserved
TRANSFER
CONTROL
1-888-INTERSIL or 1-888-468-3774
INC/DEC
WRITE
READ
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
POWER-ON RECALL
REGISTER (WCR)
WIPER COUNTER
Features
• Single Voltage Potentiometer
• 64 Resistor Taps
• 2-wire Serial Interface for Write, Read, and Transfer
• Wiper Resistance, 150W Typical at 5V
• Non-Volatile Storage of Multiple Wiper Positions
• Power-on Recall. Loads Saved Wiper Position on Power-up.
• Standby Current < 3µA Max
• V
• 2.5kW, 10kW Total Pot Resistance
• Endurance: 100,000 Data Changes per Bit per Register
• 100 yr. Data Retention
• 14 Ld TSSOP, 16 Ld SOIC
• Low Power CMOS
• Pb-free available (RoHS compliant)
DATA REGISTERS
Operations of the Potentiometer
4 BYTES
CC
October 13, 2008
: 2.7V to 5.5V Operation
All other trademarks mentioned are the property of their respective owners.
Low Noise/Low Power/2-Wire Bus
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
V
L
/R
WIPER
L
V
V
H
W
/R
/R
H
W
POT
10kΩ
64-TAPS
X9429
FN8248.3

Related parts for X9429

X9429 Summary of contents

Page 1

... Data Sheet Single Digitally Controlled Potentiometer (XDCP™) The X9429 integrates a single digitally controlled potentiometer (XDCP monolithic CMOS integrated circuit. The digital controlled potentiometer is implemented using 63 resistive elements in a series array. Between each element are tap points connected to the wiper terminal through switches ...

Page 2

... MARKING X9429WS16* X9429WS X9429WS16Z* (Note) X9429WS Z X9429WS16I* X9429WS I X9429WS16IZ* (Note) X9429WS Z I X9429WV14 X9429 WV X9429WV14Z* (Note) X9429 WV Z X9429WV14IZ* (Note) X9429 X9429WV14I* X9429 WV I X9429YS16* X9429YS X9429YS16Z* (Note) X9429YS Z X9429YS16I* X9429YS I X9429YS16IZ* (Note) X9429YS Z I X9429YV14* X9429YV X9429YV14Z* (Note) X9429 YVZ ...

Page 3

... Set the Scale Factor and Zero Point in Sensor Signal Conditioning Circuits • Vary the Frequency and Duty Cycle of Timer ICs • Vary the DC Biasing of a Pin Diode Attenuator in RF Circuits • Provide a Control Variable ( Feedback Circuits 3 X9429 POWER-ON RECALL DR0 DR1 WIPER COUNTER REGISTER CONTROL ...

Page 4

... The Address inputs are used to set the least significant 3 bits of the 8-bit slave address. A match in the slave address serial data stream must be made with the Address input in order to initiate communication with the X9429. A maximum of 8 devices may occupy the 2-wire serial bus. 4 ...

Page 5

... The X9429 compares the serial data 2 3 stream with the address input state; a successful compare of all three address bits is required for the X9429 to respond with an acknowledge. The A driven by CMOS input signals or tied to V Acknowledge Polling The disabling of the inputs, during the internal non-volatile write operation, can be used to take advantage of the typical 5ms EEPROM write cycle time ...

Page 6

... WR Four instructions require a three-byte sequence to complete. These instructions transfer data between the host and the X9429; either between the host and one of the Data Registers or directly between the host and the Wiper Counter Register. These instructions are: SCL ...

Page 7

... Data Register (write a new value to the selected Data Register). The sequence of operations is shown in Figure 4. The Increment/Decrement command is different from the other commands. Once the command is issued and the X9429 has responded with an acknowledge, the master can SCL SDA S 0 ...

Page 8

... INC/DEC CMD ISSUED SCL SDA FIGURE 6. INCREMENT/DECREMENT TIMING LIMITS SCL FROM MASTER DATA OUTPUT FROM TRANSMITTER DATA OUTPUT FROM RECEIVER START FIGURE 7. ACKNOWLEDGE RESPONSE FROM RECEIVER 8 X9429 VOLTAGE OUT 1 T WRID 8 9 ACKNOWLEDGE October 13, 2008 FN8248.3 ...

Page 9

... Data Registers. A detailed discussion of the register organization and array operation follows. Wiper Counter Register The X9429 contains a Wiper Counter Register. The Wiper Counter Register can be envisioned as a 6-bit parallel and serial load counter with its outputs decoded to select one of sixty-four switches along its resistor array. The contents of ...

Page 10

... X9429 power-up by the value in Data Register 0. The contents of the WCR can be loaded from any of the other Data Register or directly. The contents of the WCR can be saved in a DR. OPCODE (SENT BY SLAVE ON SDA ...

Page 11

... V CC MAX R = MIN I 100 OL MIN MAX C BUS MAX. 60 RESISTANCE 40 20 MIN. RESISTANCE 100 120 BUS CAPACITANCE (PF) 11 X9429 REGISTER S S OPCODE ADDRESSES REGISTER S S OPCODE ADDRESSES ...

Page 12

... Absolute Maximum Ratings Supply Voltage (V Limits) CC X9429 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ±10% X9429-2. 2.7V to 5.5V Voltage on SCL, SDA any address input with respect -1V to +7V SS Δ . ( ±6mA W CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty ...

Page 13

... and The V ramp rate spec is always in effect Equivalent AC Load Circuit 5V 1533Ω SDA OUTPUT 100pF 13 X9429 TEST CONDITIONS OUT 3mA OL MIN. 100,000 Data changes per bit per register 100 Years TEST ...

Page 14

... Wiper Response Time After the Third (last) Power Supply is Stable WRPO t Wiper Response Time After Instruction Issued (All Load Instructions) WRL t Wiper Response Time From an Active SCL/SCK Edge (Increment/Decrement Instruction) WRID 14 X9429 PARAMETER PARAMETER PARAMETER MIN MAX (Note 7) (Note 7) UNIT 400 ...

Page 15

... Start and Stop Timing (START) SCL t SU:STA SDA Input Timing t CYC SCL SDA t SU:DAT Output Timing SCL SDA XDCP Timing (for All Load Instructions) SCL SDA X9429 HD:STA SU:STO HIGH t AA LSB t WRL (STOP) t LOW t ...

Page 16

... WIPER REGISTER ADDRESS Write Protect and Device Address Pins Timing SCL SDA WP A0, A2, A3 Applications information Basic Configurations of Electronic Potentiometers V R THREE TERMINAL POTENTIOMETER; VARIABLE VOLTAGE DIVIDER 16 X9429 INC/DEC t (START) (STOP) ... (ANY INSTRUCTION) ... ... t t SU:WPA HD:WPA TWO TERMINAL VARIABLE RESISTOR; ...

Page 17

... (1 OFFSET VOLTAGE ADJUSTMENT – 100kΩ + TL072 10kΩ 10kΩ 10kΩ +5V 17 X9429 VOLTAGE REGULATOR (REG) = 1.25V (1+R O COMPARATOR WITH HYSTERESIS 317 V (REG ...

Page 18

... All -1/2 ≤ G ≤ +1/2 INVERTING AMPLIFIER – – X9429 10kΩ FUNCTION GENERATOR FREQUENCY µ AMPLITUDE µ FILTER – ...

Page 19

... Minimum space between protru- sion and adjacent lead is 0.07mm (0.0027 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. (Angles in degrees) 19 X9429 M14.173 14 LEAD THIN SHRINK SMALL OUTLINE PLASTIC ...

Page 20

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 20 X9429 M16.3 (JEDEC MS-013-AA ISSUE C) 16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE ...

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