HI5905EVAL2 INTERSIL [Intersil Corporation], HI5905EVAL2 Datasheet

no-image

HI5905EVAL2

Manufacturer Part Number
HI5905EVAL2
Description
14-Bit, 5 MSPS A/D Converter
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
14-Bit, 5 MSPS A/D Converter
The HI5905 is a monolithic, 14-bit, 5 MSPS Analog-to-
Digital Converter fabricated in an advanced BiCMOS
process. It is designed for high speed, high resolution
applications where wide bandwidth, low power
consumption and excellent SINAD performance are
essential. With a 100MHz full power input bandwidth and
high frequency accuracy, the converter is ideal for many
types of communication systems employing digital IF
architectures.
The HI5905 is designed in a fully differential pipelined
architecture with a front end differential-in-differential-out
sample-and-hold amplifier (S/H). The HI5905 has excellent
dynamic performance while consuming 350mW power at 5
MSPS.
Data output latches are provided which present valid data to
the output bus with a low data latency of 4 clock cycles.
Ordering Information
Pinout
HI5905IN
HI5905EVAL2
NUMBER
PART
TEMP. RANGE
-40 to 85
(
o
25
C)
13
44 Ld MQFP
Low Frequency Eval Platform
PACKAGE
D
AV
A
GND1
Data Sheet
V
GND
V
V
NC
NC
NC
NC
NC
CC
IN+
DC
IN-
Q44.10x10
10
11
1
2
3
4
5
6
7
8
9
12 13 14 15 16 17
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
44 43 42 41 40
PKG.
NO.
HI5905 (MQFP)
TOP VIEW
39 38 37 36 35 34
18
Features
• Sampling Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 MSPS
• Low Power at 5 MSPS . . . . . . . . . . . . . . . . . . . . . .350mW
• Internal Sample and Hold
• Fully Differential Architecture
• Full Power Input Bandwidth . . . . . . . . . . . . . . . . . 100MHz
• SINAD at 1MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . >70dB
• Low Data Latency
• Internal Voltage Reference
• TTL Compatible Clock Input
• CMOS Compatible Digital Data Outputs
Applications
• Digital Communication Systems
• Undersampling Digital IF
• Asymmetric Digital Subscriber Line (ADSL)
• Document Scanners
• Reference Literature
19
1-888-INTERSIL or 321-724-7143
- AN9214, Using Intersil High Speed A/D Converters
- AN9785, Using the Intersil HI5905 EVAL2 Evaluation
20
Board
21
22
January 1999
33
32
31
30
29
28
27
26
25
24
23
D3
D4
D5
D6
D7
NC
DV
D
D8
D9
NC
GND2
CC2
|
Copyright
File Number
©
Intersil Corporation 1999
HI5905
4259.3

Related parts for HI5905EVAL2

HI5905EVAL2 Summary of contents

Page 1

... Data output latches are provided which present valid data to the output bus with a low data latency of 4 clock cycles. Ordering Information PART TEMP. RANGE o NUMBER ( C) PACKAGE HI5905IN - MQFP HI5905EVAL2 25 Low Frequency Eval Platform Pinout GND1 GND ...

Page 2

Functional Block Diagram S/H Typical Application Schematic CLOCK + HI5905 BIAS STAGE 1 4-BIT 4-BIT FLASH DAC + - X8 STAGE 4 ...

Page 3

Absolute Maximum Ratings Supply Voltage GND ...

Page 4

Electrical Specifications PARAMETER INTERNAL VOLTAGE REFERENCE Reference Output Voltage, V ROUT Reference Output Current Reference Temperature Coefficient REFERENCE VOLTAGE INPUT Reference Voltage Input, V RIN Total Reference Resistance Reference Current DC BIAS ...

Page 5

Timing Waveforms ANALOG INPUT CLOCK INPUT INPUT S/H 1ST STAGE 2ND STAGE 3RD ...

Page 6

Typical Performance Curves 12 11.75 11 1MHz IN o 11. 10.75 10.5 10. (MSPS) S FIGURE 3. EFFECTIVE NUMBER OF BITS (ENOB) AND SINAD ...

Page 7

Pin Descriptions PIN # NAME DESCRIPTION Connection Connection 3 D Digital Ground GND1 Connection 5 AV Analog Supply (5.0V Analog Ground GND Connection 8 NC ...

Page 8

Because of the pipeline nature of this converter, the digital data representing an analog input sample is output to the digital data bus on the 4th cycle of the clock after the analog sample is taken. This time delay is ...

Page 9

V IN VDC VDC FIGURE 10. DC COUPLED DIFFERENTIAL INPUT The resistors Figure 10 are not absolutely necessary but may be used as load setting resistors. A capacitor, C, connected from V ...

Page 10

Integral Linearity Error (INL) INL is the worst case deviation of a code center from a best fit straight line calculated from the measured data. Power Supply Rejection Ratio (PSRR) Each of the power supplies are moved plus and minus ...

Page 11

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with- out ...

Related keywords