MM908E622ACDWBR2 FREESCALE [Freescale Semiconductor, Inc], MM908E622ACDWBR2 Datasheet - Page 27

• Manufacturer Part Number: MM908E622ACDWBR2
• Description: Integrated Quad Half-bridge, Triple High Side and EC Glass Driver with Embedded MCU and LIN for High End Mirror
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Table 6. Operating Modes Overview
OPERATING MODES OF THE MCU
the MCU, refer to the MC68HC908EY16 datasheet.
interrupt pulse on the
event or fault to the MCU. All interrupts are maskable and can
be enabled/disabled via the SPI (Interrupt Mask Register).
After reset all interrupts are automatically disabled.
Low Voltage Interrupt
voltage V
will set the LVIF bit in the Interrupt Flag Register. In case the
low voltage interrupt is enabled (LVIE = 1), an interrupt will be
initiated.
circuitry is disabled.
High Voltage Interrupt
supply voltage V
threshold, it will set the HVIF bit in the Interrupt Flag Register.
If the high voltage interrupt is enabled (HVIE = 1), an interrupt
will be initiated.
Analog Integrated Circuit Device Data
Freescale Semiconductor
Notes
Normal Request
31.
Device Mode
Normal (Run)
For a detailed description of the operating modes of
The 908E622 has seven different interrupt sources. An
Low voltage interrupt (LVI) is related to external supply
During Sleep and Stop mode the low voltage interrupt
The high voltage interrupt (HVI) is related to the external
During Stop and Sleep mode the HVI circuitry is disabled.
Reset
Sleep
Stop
The SPI is still active in Stop mode. However, due to the limited current capability of the voltage regulator in Stop mode, the PSON
bit has to be set before the increased current caused from a running MCU causes an LVR.
SUP
. If this voltage falls below the LVI threshold, it
SUP
V
Voltage Regulator
current capability
DD
. If this voltage rises above the HVI
IRQ_A
ON with limited
V
V
V
V
DD
DD
DD
DD
OFF
ON
ON
ON
pin is generated to report an
Wake-up Capabilities
(SPI PSON=1)
L0 state change
L0 state change
LIN wake-up,
LIN wake-up
N/A
N/A
N/A
(31)
INTERRUPTS
Output
RST_A
HIGH
HIGH
HIGH
LOW
LOW
High Temperature Interrupt
on chip temperature sensors. If the chip temperature is above
the HTI threshold, the HTIF bit in the Interrupt Flag Register
will be set. If the high temperature interrupt is enabled (HTIE
= 1), an interrupt will be initiated.
LIN Interrupt
interrupt is enabled (LINIE = 1) in Stop mode, an interrupt is
asserted if a rising edge is detected, and the bus was
dominant longer than T
the LINIF is indicating the reason for the wake-up / interrupt.
Power Stage Fail Interrupt
any of the power stages (see
1), an interrupt will be initiated if:
disabled.
The high temperature interrupt (HTI) is generated by the
During Stop and Sleep mode the HTI circuitry is disabled.
The LIN Interrupt is related to the Stop mode. If the LIN
The power stage fail flag indicates an error condition on
In case the power stage fail interrupt is enabled (PSFIE =
During Stop and Sleep mode, the PSFI circuitry is
Window Watchdog
MCU monitoring/
typical) time out to
t
NORMREQ
active if enabled
set PSON bit in
System Control
Watchdog
Function
Disabled
Disabled
Disabled
Register
(80 ms
propWL
Power Stages
FUNCTIONAL DEVICE OPERATION
Disabled
Disabled
Disabled
Disabled
Enabled
. After the wake-up / interrupt,
Figure
14, page 28).
OPERATIONAL MODES
Recessive state with
Recessive state with
wake-up capability
wake-up capability
LIN Interface
Disabled
Disabled
Enabled
908E622
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