CY8C38_1105 CYPRESS [Cypress Semiconductor], CY8C38_1105 Datasheet - Page 66

• Manufacturer Part Number: CY8C38_1105
• Description: Programmable System-on-Chip (PSoC) Multiply and divide instructions
• Manufacturer: CYPRESS [Cypress Semiconductor]

11. Electrical Specifications
Specifications are valid for –40 °C ≤ T
except where noted. The unique flexibility of the PSoC UDBs and analog blocks enable many functions to be implemented in PSoC
Creator components, see the component data sheets for full AC/DC specifications of individual functions. See the
Peripherals”
11.1 Absolute Maximum Ratings
Table 11-1. Absolute Maximum Ratings DC Specifications
Note Usage above the absolute maximum conditions listed in
maximum conditions for extended periods of time may affect device reliability. When used below maximum conditions but above
normal operating conditions the device may not operate to specification.
Document Number: 001-11729 Rev. *S
T
V
V
V
V
V
V
V
V
V
V
Ivddio
Vextref
LU
ESD
ESD
Notes
17. The V
18. Meets or exceeds JEDEC Spec EIA/JESD78 IC Latch-up Test.
STG
DDA
DDD
DDIO
CCA
CCD
SSA
GPIO
SIO
IND
BAT
Parameter
HBM
CDM
[17]
DDIO
supply voltage must be greater than the maximum analog voltage on the associated GPIO pins. Maximum analog voltage on GPIO pin ≤ V
section on page 40 for further explanation of PSoC Creator components.
Storage temperature
Analog supply voltage relative to
V
Digital supply voltage relative to
V
I/O supply voltage relative to V
Direct analog core voltage input
Direct digital core voltage input
Analog ground voltage
DC input voltage on GPIO
DC input voltage on SIO
Voltage at boost converter input
Boost converter supply
Current per V
ADC external reference inputs
Latch up current
Electrostatic discharge voltage
Electrostatic discharge voltage
SSA
SSD
Description
DDIO
[18]
supply pin
A
≤ 85 °C and T
SSD
Higher storage temperatures
reduce NVL data retention time.
Recommended storage temper-
ature is +25 °C ±25 °C. Extended
duration storage temperatures
above 85 °C degrade reliability.
Includes signals sourced by V
and routed internal to the pin
Output disabled
Output enabled
Pins P0[3], P3[2]
Human body model
Charge device model
J
≤ 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V,
Table 11-1
Conditions
may cause permanent damage to the device. Exposure to
DDA
PSoC
V
V
V
V
V
SSD
SSD
SSD
SSD
SSD
–140
–0.5
–0.5
–0.5
–0.5
–0.5
Min
–55
750
500
0.5
–
–
– 0.5
– 0.5
– 0.5
– 0.5
– 0.5
®
3: CY8C38 Family
Typ
25
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Data Sheet
V
V
“Example
DDIO
Max
1.95
1.95
SSD
100
100
140
0.5
0.5
5.5
5.5
Page 66 of 130
–
6
6
6
7
6
2
–
+
+
DDIO
≤ V
Units
mA
mA
°C
V
V
V
V
V
V
V
V
V
V
V
V
V
V
DDA
.
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