MC68HC08AZ60CFU MOTOROLA [Motorola, Inc], MC68HC08AZ60CFU Datasheet - Page 124

• Manufacturer Part Number: MC68HC08AZ60CFU
• Description: Advance Information
• Manufacturer: MOTOROLA [Motorola, Inc]

Clock Generator Module (CGM)
MC68HC08AZ60 — Rev 1.0
124
NOTE:
NOTE:
The multiplier select bits have built-in protection that prevents them from
being written when the PLL is on (PLLON = 1).
VRS7–VRS4 — VCO Range Select Bits
The VCO range select bits have built-in protection that prevents them
from being written when the PLL is on (PLLON = 1) and prevents
selection of the VCO clock as the source of the base clock (BCS = 1) if
the VCO range select bits are all clear.
The VCO range select bits must be programmed correctly. Incorrect
programming can result in failure of the PLL to achieve lock.
Freescale Semiconductor, Inc.
These read/write bits control the hardware center-of-range linear
multiplier L, which controls the hardware center-of-range frequency,
f
113, and
be written when the PLLON bit in the PLL control register (PCTL) is
set. See
$0 in the VCO range select bits disables the PLL and clears the BCS
bit in the PCTL. (See
Special Programming Exceptions
information.) Reset initializes the bits to $6 to give a default range
multiply value of 6.
VRS
For More Information On This Product,
MUL7:MUL6:MUL5:MUL4
. (See
Table 3. VCO Frequency Multiplier (N) Selection
Clock Generator Module (CGM)
Special Programming Exceptions
PLL Control Register
Go to: www.freescale.com
Circuits
0000
0001
0010
0011
1101
1110
1111
on page 109,
Base Clock Selector Circuit
on page 119.) VRS7–VRS4 cannot
Programming the PLL
VCO Frequency Multiplier (N)
on page 115 for more
on page 115. A value of
13
14
15
1
1
2
3
on page 115 and
MOTOROLA
on page
20-cgm