MC68HC08AZ60CFU MOTOROLA [Motorola, Inc], MC68HC08AZ60CFU Datasheet - Page 404

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MC68HC08AZ60CFU

Manufacturer Part Number
MC68HC08AZ60CFU
Description
Advance Information
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
Analog-to-Digital Converter (ADC-15)
ADC Data Register
ADC Input Clock
Register
MC68HC08AZ60 — Rev 1.0
404
Address:
Address:
One 8-bit result register is provided. This register is updated each time
an ADC conversion completes.
This register selects the clock frequency for the ADC.
ADIV2–ADIV0 — ADC Clock Prescaler Bits
Reset:
Reset:
Read:
Read:
Write:
Write:
Freescale Semiconductor, Inc.
ADIV2, ADIV1, and ADIV0 form a 3-bit field which selects the divide
ratio used by the ADC to generate the internal ADC clock.
shows the available clock configurations. The ADC clock should be
set to approximately 1 MHz.
For More Information On This Product,
$003A
ADIV2
$0039
Analog-to-Digital Converter (ADC-15)
Bit 7
AD7
Bit 7
R
R
R
0
Figure 4. ADC Input Clock Register (ADICLK)
Go to: www.freescale.com
= Reserved
= Reserved
Figure 3. ADC Data Register (ADR)
ADIV1
AD6
R
6
6
0
ADIV0
AD5
R
5
5
0
Indeterminate after Reset
ADICLK
AD4
R
4
4
0
AD3
R
R
3
3
0
0
AD2
R
R
2
2
0
0
AD1
R
R
1
1
0
0
MOTOROLA
Table 2
10-adc-15
Bit 0
AD0
Bit 0
R
R
0
0

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