MC68HC08AZ60CFU MOTOROLA [Motorola, Inc], MC68HC08AZ60CFU Datasheet - Page 264

• Manufacturer Part Number: MC68HC08AZ60CFU
• Description: Advance Information
• Manufacturer: MOTOROLA [Motorola, Inc]

Timer Interface Module B (TIMB)
MC68HC08AZ60 — Rev 1.0
264
NOTE:
MSxA — Mode Select Bit A
Before changing a channel function by writing to the MSxB or MSxA bit,
set the TSTOP and TRST bits in the TIMB status and control register
(TBSC).
ELSxB and ELSxA — Edge/Level Select Bits
Freescale Semiconductor, Inc.
When ELSxB:A
operation or unbuffered output compare/PWM operation. (See
2).
When ELSxB:A = 00, this read/write bit selects the initial output level
of the TCHx pin once PWM, input capture, or output compare
operation is enabled. (See
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to port E or port F, and pin PTEx/TBCHx or pin PTFx/TBCHx is
available as a general-purpose I/O pin. However, channel x is at a
state determined by these bits and becomes transparent to the
respective pin when PWM, input capture, or output compare mode is
enabled.
the ELSxB and ELSxA bits.
For More Information On This Product,
1 = Unbuffered output compare/PWM operation
0 = Input capture operation
1 = Initial output level low
0 = Initial output level high
Timer Interface Module B (TIMB)
Table 2
Go to: www.freescale.com
shows how ELSxB and ELSxA work. Reset clears
00, this read/write bit selects either input capture
Table
2). Reset clears the MSxA bit.
MOTOROLA
Table
22-timb