SAF-XC164GM-8F20F INFINEON [Infineon Technologies AG], SAF-XC164GM-8F20F Datasheet - Page 16

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SAF-XC164GM-8F20F

Manufacturer Part Number
SAF-XC164GM-8F20F
Description
16-Bit Single-Chip Microcontroller with C166SV2 Core
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet

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Part Number:
SAF-XC164GM-8F20F AA
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3
The architecture of the XC164GM combines advantages of RISC, CISC, and DSP
processors with an advanced peripheral subsystem in a very well-balanced way. In
addition, the on-chip memory blocks allow the design of compact systems-on-silicon with
maximum performance (computing, control, communication).
The on-chip memory blocks (program code-memory and SRAM, dual-port RAM, data
SRAM) and the set of generic peripherals are connected to the CPU via separate buses.
Another bus, the LXBus, connects additional on-chip resources (see
This bus structure enhances the overall system performance by enabling the concurrent
operation of several subsystems of the XC164GM.
The following block diagram gives an overview of the different on-chip components and
of the advanced, high bandwidth internal bus structure of the XC164GM.
Figure 3-1
Data Sheet
XTAL
Channels
C lo ck Ge n e ra tio n
8/10-Bit
ADC
6 4 K by te s (8 F de v ic e )
3 2 K by te s (4 F de v ic e )
D e b u g Su p p o rt
Osc / PLL
14
OCDS
Port 9
Functional Description
ProgMem
PSRAM
2 K by te s
6
Flash
Block Diagram
GPT
T2
T3
T4
T5
T6
(USART)
ASC0
BRGen
RTC
(USART)
ASC1
WDT
BRGen
Port 5
14
SSC0
BRGen
(SPI)
SSC1
C 1 6 6 SV2 -C ore
BRGen
(SPI)
Interrupt & PEC
DPRAM
14
2 K by te s
CPU
Port 3
13
CC2
T7
T8
Peripheral Data Bus
Interrupt Bus
Functional Description
PORT1
mc_xc164gm_block.vsd
14
Figure
(8 F de v ic e )
DSRAM
2 K by te s
Derivatives
V1.0, 2005-11
reduced
XC164GM
Control
LXBus
EBC
3-1).
Twin
CAN
A B

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