QLX411GRX INTERSIL [Intersil Corporation], QLX411GRX Datasheet

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QLX411GRX

Manufacturer Part Number
QLX411GRX
Description
Quad Lane Extender
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
Quad Lane Extender
QLx411GRx
The QLx411GRx is a settable quad receive-side equalizer
with extended functionality for advanced protocols
operating with line rates up to 11.3Gb/s such as
InfiniBand (SDR, DDR and QDR) and 40G Ethernet
(40GBase-CR4). The QLx411GRx compensates for the
frequency dependent attenuation of copper twin-axial
cables, extending the signal reach up to at least 10m on
28AWG cable.
The small form factor, highly-integrated quad design is
ideal for high-density data transmission applications
including active copper cable assemblies. The four
equalizing filters within the QLx411GRx can each be set
to provide optimal signal fidelity for a given media and
length. The compensation level for each filter is set by
two external control pins.
Operating on a single 1.2V power supply, the QLx411GRx
enables per channel throughputs of 10Gb/s to 11.3Gb/s
while supporting lower data rates including 8.5, 6.25, 5,
4.25, 3.125, and 2.5Gb/s. The QLx411GRx uses current
mode logic (CML) inputs/outputs and is packaged in a
4mmx7mm 46 lead QFN. Individual lane LOS support is
included for module applications.
Typical Application Circuit
November 19, 2009
FN6989.1
Fabric Switch
Rx1[P,N]
Rx2[P,N]
Rx3[P,N]
Rx4[P,N]
Tx1[P,N]
Tx2[P,N]
Tx3[P,N]
Tx4[P,N]
0.1μF
0.1μF
0.1μF
0.1μF
OUT1[P,N]
OUT2[P,N]
OUT3[P,N]
OUT4[P,N]
Connector Paddle Card
QLx411GRx
4
LOS
1
12
CP
IN1[P,N]
IN2[P,N]
IN3[P,N]
IN4[P,N]
EP
1.2V
DT
V
DD
100pF
10nF
0.1μF
0.1μF
0.1μF
0.1μF
1-888-INTERSIL or 1-888-468-3774
1.2V
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Active Copper Cable Assembly
8-Pair Differential 100Ω
Twin-Axial Cable
≤ 10m 28AWG
Features
• Supports data rates up to 11.3Gb/s
• Low power (135mW per channel)
• Low latency (<500ps)
• Four equalizers in a 4mmx7mm QFN package for
• Each equalizer boost is independently pin selectable
• Supports 64b/66b encoded data – long run lengths
• Line silence preservation
• 1.2V supply voltage
• Individual lane LOS support
Applications
• QSFP active copper cable modules
• InfiniBand SDR, DDR and QDR
• 40G Ethernet (40GBase-CR4)
• XAUI and RXAUI
• High-speed active cable assemblies
• High-speed printed circuit board (PCB) traces
Benefits
• Thinner gauge cable
• Extends cable reach greater than 3x
• Improved BER
straight route-through architecture and simplified
routing
All other trademarks mentioned are the property of their respective owners.
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
1.2V
Copyright Intersil Americas Inc. 2009. All Rights Reserved
0.1μF
0.1μF
0.1μF
0.1μF
100pF
10nF
1.2V
V
IN1[P,N]
IN2[P,N]
IN3[P,N]
IN4[P,N]
DT
DD
Connector Paddle Card
QLx411GRx
EP CP LOS
12
OUT1[P,N]
OUT2[P,N]
OUT3[P,N]
OUT4[P,N]
4
0.1μF
0.1μF
0.1μF
0.1μF
Host Channel
Adapter
Rx1[P,N]
Rx2[P,N]
Rx3[P,N]
Rx4[P,N]
Tx1[P,N]
Tx2[P,N]
Tx3[P,N]
Tx4[P,N]

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QLX411GRX Summary of contents

Page 1

... The compensation level for each filter is set by two external control pins. Operating on a single 1.2V power supply, the QLx411GRx enables per channel throughputs of 10Gb/s to 11.3Gb/s while supporting lower data rates including 8.5, 6.25, 5, 4.25, 3.125, and 2.5Gb/s. The QLx411GRx uses current mode logic (CML) inputs/outputs and is packaged in a 4mmx7mm 46 lead QFN ...

Page 2

... IPC/JEDEC J STD-020. Pin Configuration 2 QLx411GRx TEMP. RANGE (° + QFN 7” Prod. Tape & Reel; Qty 1,000 QFN 7” Sample Reel; Qty 100 QLx411GRx (46 LD 4x7 QFN) TOP VIEW IN1[ IN1[N] ...

Page 3

... A is the MSB, and B is the LSB. Pins are internally pulled down through a 25kΩ resistor. EXPOSED - Exposed ground pad. For proper electrical and thermal performance, this pad should be PAD connected to the PCB ground plane. 3 QLx411GRx DESCRIPTION FN6989.1 November 19, 2009 ...

Page 4

... CC (Common Mode) Output Return Loss (Com. to Diff. Conversion) 4 QLx411GRx Thermal Information Operating Ambient Temperature Range . . . . . . 0°C to +70°C + 0.3V Storage Ambient Temperature Range . . . . -55°C to +150°C DD Maximum Junction Temperature . . . . . . . . . . . . . . . +125°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp SYMBOL ...

Page 5

... Data-to-Line Silence Response Time Line Silence-to-Data Response Time NOTES: 1. After channel loss, differential amplitudes at QLx411GRx inputs must meet the input voltage range specified in “Absolute Maximum Ratings” on page 4. 2. Temperature = +25° 1.2V Output residual jitter is the difference between the total jitter at the lane extender output and the total jitter of the transmitted signal (as measured at the input to the channel) ...

Page 6

... Performance is measured using the test setup illustrated in Figure 1. The signal from the pattern generator is launched into the twin-ax cable using an SMA/CX4 adapter card. The chip evaluation board is connected to the output of the cable through another adapter card. The QLx411GRx output signal is then visualized on a scope to determine signal integrity parameters such as jitter (Note 7). ...

Page 7

... FIGURE 4. FUNCTIONAL DIAGRAM OF A SINGLE CHANNEL WITHIN THE QLx411GRx Operation The QLx411GRx is an advanced quad lane-extender for high-speed interconnects. A functional diagram of one of the four channels in the QLx411GRx is shown in Figure 4. In addition to a robust equalization filter to compensate for channel loss and restore signal fidelity, the ...

Page 8

... Line silence is commonly broken by the limiting amplification in other equalizers. This disruption can be detrimental in many systems that rely on line silence as part of the protocol. The QLx411GRx contains special lane management capabilities to detect and preserve periods of line silence while still providing the fidelity- enhancing benefits of limiting amplification during active data transmission ...

Page 9

... Typical Application Reference Design Figure 8 shows reference design schematics for a QLx411GRx evaluation board with an SMA connector interface. 1.2V Detection threshold reference voltage Loss of signal indicator (Channels 1 and 2) 1.2V Bypass circuit for each V pin 10, 29, 32 (*100pF capacitor should be positioned closest to the pin) FIGURE 8 ...

Page 10

... Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see 10 QLx411GRx www.intersil.com/product_tree www.intersil.com/design/quality www.intersil.com FN6989.1 ...

Page 11

... LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE (TQFN) Rev 0, 9/09 4.00 6 PIN 1 INDEX AREA (4X) 0.05 TOP VIEW 0.70 ±0.05 SIDE VIEW ( 3. 2.50 5.50 ) TYPICAL RECOMMENDED LAND PATTERN 11 QLx411GRx A B SIDE VIEW SEE DETAIL "X" 0. SEATING PLANE 0.05 C NOTES: 1. Dimensions are in millimeters. Dimensions Dimensioning and tolerancing conform to AMSE Y14.5m-1994. ...

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