74LCXP16245_05 FAIRCHILD [Fairchild Semiconductor], 74LCXP16245_05 Datasheet

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74LCXP16245_05

Manufacturer Part Number
74LCXP16245_05
Description
Low Voltage 16-Bit Bidirectional Transceiver with 5V Tolerant Inputs/Outputs and Pull-Down Resistors
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet
© 2005 Fairchild Semiconductor Corporation
74LCXP16245MEA
74LCXP16245MTD
74LCXP16245
Low Voltage 16-Bit Bidirectional Transceiver with
5V Tolerant Inputs/Outputs and Pull-Down Resistors
General Description
The LCXP16245 contains sixteen non-inverting bidirec-
tional buffers with 3-STATE outputs and is intended for bus
oriented applications. The device is designed for low volt-
age (2.5V or 3.3V) V
facing to a 5V signal environment. The device is byte
controlled. Each byte has separate control inputs which
could be shorted together for full 16-bit operation. The T/R
inputs determine the direction of data flow through the
device. The OE inputs disable both the A and B ports by
placing them in a high impedance state.
In addition, A and B port datapath pins have built-in resis-
tors to GND allowing the pins to float without any increase
in I
and space constrained applications where additional space
consumed by external resistors is not available.
The LCXP16245 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Order Number
CC
current. This feature is intended to address modular
Package Number
CC
applications with capability of inter-
MS48A
MTD48
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
DS500053
Features
Note 1: To ensure the high-impedance state during power up or down OE
should be tied to V
resistor is determined by the current-sourcing capability of the driver.
Pin Descriptions
5V tolerant inputs and outputs
2.3V–3.6V V
I/O pull-down resistors terminate inactive busses ensur-
ing a stable bus state
5.5 ns t
Power down high impedance inputs and outputs
Supports live insertion/withdrawal (Note 1)
r
Implements patented noise/EMI reduction circuitry
Pinout compatible with 74 series 16245
Latch-up performance exceeds 500 mA
ESD performance:
OE
T/R
A
B
24 mA output drive (V
Human body model
Machine model
0
0
Pin Names
–A
–B
n
n
Package Description
15
15
PD
max (V
CC
CC
through a pull-up resistor: the minimum value or the
specifications provided
CC
Output Enable Input
Transmit/Receive Input
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
!
200V
!
3.3V), 20
CC
2000V
3.0V)
August 1998
Revised June 2005
Description
P
A I
CC
www.fairchildsemi.com
max

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74LCXP16245_05 Summary of contents

Page 1

Low Voltage 16-Bit Bidirectional Transceiver with 5V Tolerant Inputs/Outputs and Pull-Down Resistors General Description The LCXP16245 contains sixteen non-inverting bidirec- tional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is designed for low volt- ...

Page 2

Connection Diagram Functional Descriptions The LCXP16245 contains sixteen non-inverting bidirec- tional buffers with 3-STATE outputs. the device is byte con- trolled. Each byte has separate control inputs which can be shorted together for full 16-bit operation. The T/R inputs determine ...

Page 3

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Source/Sink Current Supply ...

Page 4

DC Electrical Characteristics Symbol Parameter ' I Increase in I per Input CC CC Note 5: Outputs disabled or 3-STATE only. AC Electrical Characteristics Symbol Parameter t Propagation Delay PHL PLH n ...

Page 5

AC LOADING and WAVEFORMS FIGURE 1. AC Test Circuit (C t PLH t PZL t PZH Waveform for Inverting and Non-Inverting Functions Propagation Delay. Pulse Width and t rec 3-STATE Output Low Enable and Disable Times for Logic (Input Characteristics; ...

Page 6

Schematic Diagram Generic for LCX Family www.fairchildsemi.com 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide Package Number MS48A 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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