CY62256-55 CYPRESS [Cypress Semiconductor], CY62256-55 Datasheet - Page 5

• Manufacturer Part Number: CY62256-55
• Description: 256K (32K x 8) Static RAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document #: 38-05248 Rev. *C
Switching Characteristics
Switching Waveforms
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
Notes:
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
HZWE
LZWE
10. The internal Write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a Write and either signal can terminate
11. The minimum Write cycle time for Write cycle #3 (WE controlled, OE LOW) is the sum of t
12. Device is continuously selected. OE, CE = V
13. WE is HIGH for Read cycle.
7.
8.
9.
Read Cycle No. 1
DATA OUT
ADDRESS
Parameter
Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
I
At any given temperature and voltage condition, t
t
a Write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the Write.
OL
HZOE
/I
OH
, t
and 100-pF load capacitance.
HZCE
[10, 11]
, and t
HZWE
[12, 13]
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low-Z
OE HIGH to High-Z
CE LOW to Low-Z
CE HIGH to High-Z
CE LOW to Power-up
CE HIGH to Power-down
Write Cycle Time
CE LOW to Write End
Address Set-up to Write End
Address Hold from Write End
Address Set-up to Write Start
WE Pulse Width
Data Set-up to Write End
Data Hold from Write End
WE LOW to High-Z
WE HIGH to Low-Z
are specified with C
PREVIOUS DATA VALID
Over the Operating Range
L
= 5 pF as in (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
IL
[8]
[8]
.
Description
[8, 9]
[8, 9]
[8]
[8, 9]
t
OHA
HZCE
is less than t
t
AA
LZCE
[7]
, t
HZOE
is less than t
t
RC
HZWE
LZOE
Min.
and t
55
55
45
45
40
25
CY62256−55
, and t
5
5
5
0
0
0
0
5
SD
HZWE
is less than t
Max.
55
55
25
20
20
55
20
DATA VALID
LZWE
Min.
70
70
60
60
50
30
CY62256−70
0
for any given device.
5
5
5
0
0
0
5
Max.
70
70
35
25
25
70
25
CY62256
Page 5 of 12
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns