HYB18T512800B2F QIMONDA [Qimonda AG], HYB18T512800B2F Datasheet - Page 3

• Manufacturer Part Number: HYB18T512800B2F
• Description: 200-Pin SO-DIMM DDR2 SDRAM Modules
• Manufacturer: QIMONDA [Qimonda AG]

1
This chapter gives an overview of the 200-Pin SO-DIMM DDR2 SDRAM Modules product family and describes its main
characteristics.
1.1
• 200-Pin PC2–6400, PC2–5300 and PC2–4200 DDR2
• 32M × 64, 64M × 64 and 128M × 64 module
• Standard Double-Data-Rate-Two Synchronous DRAMs
• 256MB, 512MB and 1GB modules built with 512-Mbit
• Programmable CAS Latencies (3, 4 ,5 and 6), Burst
• Auto Refresh (CBR) and Self Refresh
1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined
Rev. 1.1, 2007-01
08212006-PKYN-2H1B
Product Type Speed Code
Speed Grade
Max. Clock Frequency
Min. RAS-CAS-Delay
Min. Row Precharge Time
Min. Row Active Time
Min. Row Cycle Time
SDRAM memory modules for use as main memory when
installed in systems such as mobile personal computers.
organization,and 32M × 16, 64M × 8 chip organization
(DDR2 SDRAM) with a single + 1.8 V (± 0.1 V) power
supply
DDR2 SDRAMs in PG-TFBGA-60 and PG-TFBGA-84
chipsize packages
Length (8 & 4) and Burst Type
in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury,
lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers.
Overview
Features
@CL6
@CL5
@CL4
@CL3
f
f
f
f
t
t
t
t
CK6
CK5
CK4
CK3
RCD
RP
RAS
RC
–2.5F
PC2–6400
5–5–5
400
400
266
200
12.5
12.5
45
57.5
–2.5
PC2–6400
6–6–6
400
333
266
200
15
15
45
60
3
• Programmable self refresh rate via EMRS2 setting
• Programmable partial array refresh via EMRS2 settings
• DCC enabling via EMRS2 setting
• All speed grades faster than DDR2–400 comply with
• All inputs and outputs SSTL_1.8 compatible
• Off-Chip Driver Impedance Adjustment (OCD) and On-Die
• Serial Presence Detect with E
• SO-DIMM Dimensions (nominal): 30 mm high,
• Based on standard reference layouts Raw Card “A”,
• RoHS compliant products
DDR2–400 timing specifications.
Termination (ODT)
67.60 mm wide
“C”,”E”
HYS64T[32/64/128]xxxEDL–[25F/…/3.7](–)B2
–3
PC2–5300
4–4–4
—
333
333
200
12
12
45
57
Small Outlined DDR2 SDRAM Modules
–3S
PC2–5300
5–5–5
—
333
266
200
15
15
45
60
1)
2
PROM
Performance Table
Internet Data Sheet
–3.7
PC2–4200
4–4–4
—
266
266
200
15
15
45
60
TABLE 1
Unit
—
MHz
MHz
MHz
MHz
ns
ns
ns
ns