ICE3BR1065J_11 INFINEON [Infineon Technologies AG], ICE3BR1065J_11 Datasheet - Page 9

• Manufacturer Part Number: ICE3BR1065J_11
• Manufacturer: INFINEON [Infineon Technologies AG]

The Undervoltage Lockout monitors the external
supply voltage V
main line the internal Startup Cell is biased and starts
to charge the external capacitor C
connected to the VCC pin. This VCC charge current is
controlled to 0.9mA by the Startup Cell. When the V
exceeds the on-threshold V
are switched on. Then the Startup Cell is switched off
by the Undervoltage Lockout and therefore no power
losses present due to the connection of the Startup Cell
to the Drain voltage. To avoid uncontrolled ringing at
switch-on, a hysteresis start up voltage is implemented.
The switch-off of the controller can only take place
when V
was entered. The maximum current consumption
before the controller is activated is about 150mA.
When V
the bias circuit is switched off and the soft start counter
is reset. Thus it is ensured that at every startup cycle
the soft start starts at zero.
The internal bias circuit is switched off if Auto Restart
Mode is entered. The current consumption is then
reduced to 150mA.
Once the malfunction condition is removed, this block
will then turn back on. The recovery from Auto Restart
Mode does not require re-cycling the AC line.
When Active Burst Mode is entered, the internal Bias is
switched off most of the time but the Voltage Reference
is kept alive in order to reduce the current consumption
below 450mA.
3.3
Figure 4
Version 2.0
FB
Soft-Start Comparator
VCC
VCC
Improved
Current Mode
Improved Current Mode
0.67V
Current Mode
falls below 10.5V after normal operation
falls below the off-threshold V
PWM OP
VCC
C8
. When the SMPS is plugged to the
x3.3
CCon
=18V the bias circuit
PWM-Latch
R
S
CS
VCC
CCoff
Q
Q
which is
Driver
=10.5V,
VCC
9
Current Mode means the duty cycle is controlled by the
slope of the primary current. This is done by comparing
the FB signal with the amplified current sense signal.
Figure 5
In case the amplified current sense signal exceeds the
FB signal the on-time T
resetting the PWM-Latch (see Figure 5).
The primary current is sensed by the external series
resistor R
CoolMOS
secondary output voltage is insensitive to the line
variations. The current waveform slope will change with
the line variation, which controls the duty cycle.
The external R
the maximum source current of the integrated
CoolMOS
To improve the Current Mode during light load
conditions the amplified current ramp of the PWM-OP
is superimposed on a voltage ramp, which is built by
the switch T2, the voltage source V1 and a resistor R1
(see Figure 6). Every time the oscillator shuts down for
maximum duty cycle limitation the switch T2 is closed
by V
T2 is opened so that the voltage ramp can start.
In case of light load the amplified current ramp is too
small to ensure a stable regulation. In that case the
Voltage Ramp is a well defined signal for the
comparison with the FB-signal. The duty cycle is then
controlled by the slope of the Voltage Ramp.
By means of the time delay circuit which is triggered by
the inverted V
until it reaches approximately 156ns delay time (see
Figure 7). It allows the duty cycle to be reduced
continuously till 0% by decreasing V
threshold.
0.67V
Driver
Amplified Current Signal
FB
OSC
. When the oscillator triggers the Gate Driver,
Sense
®
®
. By means of Current Mode regulation, the
.
Pulse Width Modulation
t
OSC
on
inserted in the source of the integrated
Sense
signal, the Gate Driver is switched-off
allows an individual adjustment of
Functional Description
on
of the driver is finished by
CoolSET
ICE3BR1065J
28 Dec 2011
FB
below that
®
-F3R
t
t