PX3511A INTERSIL [Intersil Corporation], PX3511A Datasheet - Page 5

• Manufacturer Part Number: PX3511A
• Description: Advanced Synchronous Rectified Buck MOSFET Drivers with Protection Features
• Manufacturer: INTERSIL [Intersil Corporation]

Electrical Specifications
NOTE:
Functional Pin Description
Three-State Upper Gate Falling Threshold
Shutdown Holdoff Time
UGATE Rise Time
LGATE Rise Time
UGATE Fall Time (Note 4)
LGATE Fall Time (Note 4)
UGATE Turn-On Propagation Delay (Note 4)
LGATE Turn-On Propagation Delay (Note 4)
UGATE Turn-Off Propagation Delay (Note 4)
LGATE Turn-Off Propagation Delay (Note 4)
LG/UG Three-State Propagation Delay (Note 4)
OUTPUT
Upper Drive Source Current (Note 4)
Upper Drive Source Impedance
Upper Drive Sink Current (Note 4)
Upper Drive Sink Impedance
Lower Drive Source Current (Note 4)
Lower Drive Source Impedance
Lower Drive Sink Current (Note 4)
Lower Drive Sink Impedance
4. Guaranteed by design. Not 100% tested in production.
PACKAGE PIN #
SOIC
1
2
3
4
5
6
7
8
9
-
DFN
3,8
10
11
1
2
4
5
6
7
9
PARAMETER
SYMBOL
PHASE
UGATE
LGATE
BOOT
PVCC
PWM
GND
VCC
PAD
PIN
N/C
Upper gate drive output. Connect to gate of high-side power N-Channel MOSFET.
Floating bootstrap supply pin for the upper gate drive. Connect the bootstrap capacitor between this pin and the
PHASE pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See the Internal Bootstrap
Device section under DESCRIPTION for guidance in choosing the capacitor value.
No Connection.
The PWM signal is the control input for the driver. The PWM signal can enter three distinct states during operation, see
the three-state PWM Input section under DESCRIPTION for further details. Connect this pin to the PWM output of the
controller.
Bias and reference ground. All signals are referenced to this node. It is also the power ground return of the driver.
Lower gate drive output. Connect to gate of the low-side power N-Channel MOSFET.
Connect this pin to a +12V bias supply. Place a high quality low ESR ceramic capacitor from this pin to GND.
This pin supplies power to both upper and lower gate drives in PX3511B; only the lower gate drive in PX3511A.
Its operating range is +5V to 12V. Place a high quality low ESR ceramic capacitor from this pin to GND.
Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET. This pin provides
a return path for the upper gate drive.
Connect this pad to the power ground plane (GND) via thermally enhanced connection.
5
Recommended Operating Conditions, Unless Otherwise Noted. (Continued)
R
R
I
I
U_SOURCE
L_SOURCE
SYMBOL
U_SOURCE
L_SOURCE
R
R
I
t
I
U_SINK
TSSHD
t
L_SINK
t
t
t
t
U_SINK
L_SINK
PDHU
PDHL
PDLU
PDTS
PDLL
t
t
t
t
RU
RL
FU
FL
PX3511A, PX3511B
VCC = 12V
V
V
V
V
V
V
V
V
V
V
150mA Source Current
V
150mA Sink Current
V
150mA Source Current
V
150mA Sink Current
PVCC
PVCC
PVCC
PVCC
PVCC
PVCC
PVCC
PVCC
PVCC
PVCC
PVCC
PVCC
PVCC
= 12V, 3nF Load, 10% to 90%
= 12V, 3nF Load, 10% to 90%
= 12V, 3nF Load, 90% to 10%
= 12V, 3nF Load, 90% to 10%
= 12V, 3nF Load, Adaptive
= 12V, 3nF Load, Adaptive
= 12V, 3nF Load
= 12V, 3nF Load
= 12V, 3nF Load
= 12V, 3nF Load
= 12V, 3nF Load
= 12V, 3nF Load
= 12V, 3nF Load
TEST CONDITIONS
FUNCTION
MIN
0.85
0.60
1.4
0.9
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TYP
1.96
1.25
1.65
0.94
245
2.0
1.3
26
18
18
12
10
10
10
10
10
2
2
3
MAX
1.35
3.0
3.0
2.2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
February 26, 2007
UNITS
FN6462.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
A
Ω
A
Ω
A
Ω
A
Ω