LT3837EFE-PBF LINER [Linear Technology], LT3837EFE-PBF Datasheet - Page 18

• Manufacturer Part Number: LT3837EFE-PBF
• Description: Isolated No-Opto Synchronous Flyback Controller
• Manufacturer: LINER [Linear Technology]

LT3837
APPLICATIONS INFORMATION
with slope compensation and system stability. Keep the
sync pulse width greater than 500ns.
Selecting Timing Resistors
There are three internal “one-shot” times that are pro-
grammed by external application resistors: minimum
on-time, enable delay time and primary MOSFET turn-on
delay. These are all part of the isolated fl yback control
technique, and their functions are previously outlined in
the Theory of Operation section.
The following information should help in selecting and/or
optimizing these timing values.
Minimum On-Time (t
Minimum on-time is the programmable period during
which current limit is blanked (ignored) after the turn
on of the primary side switch. This improves regulator
performance by eliminating false tripping on the leading
edge spike in the switch, especially at light loads. This
spike is due to both the gate/source charging current and
the discharge of drain capacitance. The isolated fl yback
sensing requires a pulse to sense the output. Minimum
on-time ensures that there is always a signal to close the
feedback loop. The LT3837 does not employ cycle skipping
at light loads. Therefore, minimum on-time along with
synchronous rectifi cation sets the switch over in forced
continuous mode operation.
The t
Keep R
is 160k.
18
R
tON MIN
ON(MIN)
tON(MIN)
(
)
(
resistor is set with the following equation:
k
Ω =
greater than 70k. A good starting value
)
t
ON MIN
ON(MIN)
(
1 063
)
.
( ) –
)
ns
104
Enable Delay Time (ENDLY)
Enable delay time provides a programmable delay between
turn-off of the primary gate drive node and the subsequent
enabling of the feedback amplifi er. As discussed earlier, this
delay allows the feedback amplifi er to ignore the leakage
inductance voltage spike on the primary side.
The worst-case leakage spike pulse width is at maximum
load conditions. So set the enable delay time at these
conditions.
While the typical applications for this part use forced
continuous operation, it is conceivable that a secondary-
side controller might cause discontinuous operation at
light loads. Under such conditions the amount of energy
stored in the transformer is small. The fl yback waveform
becomes “lazy” and some time elapses before it indicates
the actual secondary output voltage. The enable delay time
should be made long enough to ignore the “irrelevant”
portion of the fl yback waveform at light load.
Even though the LT3837 has a robust gate drive, the gate
transition-time slows with very large MOSFETs. Increase
delay time is as required when using such MOSFETs.
The enable delay resistor is set with the following
equation:
Keep R
is 56k.
R
ENDLY
ENDLY
(
Figure 3. f
k
200
100
300
Ω =
50
greater than 40k. A good starting point
)
t
30
ENDLY
OSC
2 616
vs OSC Capacitor Values
.
( ) –
ns
C
OSCAP
(pF)
30
100
3837 F02
200
3837fa