LT3837EFE-PBF LINER [Linear Technology], LT3837EFE-PBF Datasheet - Page 6

• Manufacturer Part Number: LT3837EFE-PBF
• Description: Isolated No-Opto Synchronous Flyback Controller
• Manufacturer: LINER [Linear Technology]

PIN FUNCTIONS
LT3837
TYPICAL PERFORMANCE CHARACTERISTICS
SG (Pin 1): Synchronous gate drive output. This pin pro-
vides an output signal for a secondary-side synchronous
switch. Large dynamic currents may fl ow during voltage
transitions. See the Applications Information for details.
V
with a 4.7μF capacitor or more.
t
the minimum time that the primary switch is on for each
cycle. Minimum turn-on facilitates the isolated feedback
method. See Applications Information for details.
ENDLY (Pin 4): Pin for external programming resistor to
set enable delay time. The enable delay time disables the
feedback amplifi er for a fi xed time after the turn-off of the
primary-side MOSFET. This allows the leakage inductance
voltage spike to be ignored for fl yback voltage sensing.
See Applications Information for details.
SYNC (Pin 5): Pin for synchronizing the internal oscilla-
tor with an external clock. The positive edge on a pulse
causes the oscillator to discharge causing PG to go low
(off) and SG high (on). The sync threshold is typically 1.4V.
See Applications Information for details. Tie to ground if
unused.
SFST (Pin 6): This pin, in conjunction with a capacitor to
ground, controls the ramp-up of peak primary current as
sensed through the sense resistor. This is used to control
6
ON
CC
(Pin 3): Pin for external programming resistor to set
(Pin 2): Supply voltage pin. Bypass this pin to ground
200
150
100
300
250
50
0
–50
PG Delay Time vs Temperature
–30
–10
TEMPERATURE (°C)
10
R
R
PGDLY
PGDLY
30
50
= 27.4k
= 16.7k
70
90 110
3837 G20
converter inrush current at start-up. The V
cannot exceed the SFST pin voltage, so as SFST increases,
the maximum voltage on V
allowing higher peak currents. Total V
proximately 70ms per μF of capacitance. Leave pin open
if not using the soft-start function.
OSC (Pin 7): This pin in conjunction with an external
capacitor defi nes the controller oscillator frequency. The
frequency is approximately 100kHz • 100/C
FB (Pin 8): Pin for the feedback node for the power sup-
ply feedback amplifi er. Feedback is sensed via a trans-
former winding and enabled during the fl yback period.
This pin also sinks additional current to compensate for
load current variation as set by the R
Thevenin equivalent resistance of the feedback divider
at roughly 3k.
V
switcher control loop. It is the output of the feedback
amplifi er and the input to the current comparator. Switcher
frequency compensation components are normally placed
on this pin to ground. The voltage on this pin is propor-
tional to the peak primary switch current. The feedback
amplifi er output is enabled during the synchronous switch
on time.
C
(Pin 9): Pin used for frequency compensation for the
260
240
200
180
140
220
160
–50
Enable Delay Time vs Temperature
R
ENDLY
–25
= 90k
0
TEMPERATURE (°C)
25
C
increases commensurately,
50
75
C
CMP
100
ramp time is ap-
3837 G21
pin. Keep the
125
OSC
C
pin voltage
(pF).
3837fa