LT3837EFE-PBF LINER [Linear Technology], LT3837EFE-PBF Datasheet - Page 20

• Manufacturer Part Number: LT3837EFE-PBF
• Description: Isolated No-Opto Synchronous Flyback Controller
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
LT3837
In further contrast to traditional current mode switchers,
V
The dynamic nature of the clamped feedback amplifi er
forms an effective track/hold type response, whereby the
V
“held” during the subsequent “switch on” portion of the
next cycle. This action naturally holds the V
during the current comparator sense action (current mode
switching).
If we wanted a V
of hysteresis (on at 8.4V, off at 8.1V):
Even with good board layout, board noise may cause
problems with UVLO. You can fi lter the divider but keep
large capacitance off the UVLO node because it will slow
the hysteresis produced from the change in bias current.
Figure 4c shows an alternate method of fi ltering by split-
ting the R
put more of the resistance on the UVLO side.
Control Loop Compensation
Loop frequency compensation is performed by connect-
ing a capacitor network from the output of the feedback
amplifi er (V
cause of the sampling behavior of the feedback amplifi er,
compensation is different from traditional current mode
switcher controllers. Normally only C
can be used to add a “zero” but the phase margin improve-
ment traditionally offered by this extra resistor is usually
already accomplished by the nonzero secondary circuit
impedance. C
frequency pole and is usually sized at 0.1 times C
20
C
C
R
R
voltage changes during the fl yback pulse, but is then
pin ripple is generally not an issue with the LT3837.
B
A
=
=
⎛
⎝ ⎜
3 4
0 3
.
1 24
A
.
8 4
.
86 6
μ
.
C
resistor with the capacitor. The split should
V
Figure 5. V
A
VC2
pin) to ground as shown in Figure 5. Be-
V
.
V V
=
k
–
IN
88 2
can be used to add an additional high
1
-referred trip point of 8.4V, with 0.3V
⎞
⎠ ⎟
. ,
=
V
k use
9
C
C
14 99
Compensation Network
.
3825 F05
86 6
k use
C
VC2
,
.
k
R
VC
C
15
VC
VC
k
is required. R
C
voltage stable
VC
.
VC
AN19 provides a method for empirically tweaking frequency
compensation. Basically, it involves introducing a load
current step and monitoring the response.
Slope Compensation
This part incorporates current slope compensation. Slope
compensation is required to ensure current loop stability
when the DC is greater than 50%. In some switcher con-
trollers, slope compensation reduces the maximum peak
current at higher duty cycles. The LT3837 eliminates this
need by having circuitry that compensates for the slope
compensation so that maximum current sense voltage is
constant across all duty cycles.
Minimum Load Considerations
At light loads, the LT3837 derived regulator goes into
forced continuous conduction mode. The primary side
switch always turns on for a short time as set by the
t
load requires, power will fl ow back into the primary during
the “off” period when the synchronization switch is on.
This does not produce any inherently adverse problems,
though light load effi ciency is reduced.
Maximum Load Considerations
The current mode control uses the V
amplifi ed sense resistor voltage as inputs to the current
comparator. When the amplifi ed sense voltage exceeds the
V
In normal use, the peak switch current increases while
FB is below the internal reference. This continues until
V
MOSFET will turn off at the rated 98mV V
repeats on the next cycle.
It is possible for the peak primary switch currents as
referred across R
because of the minimum switch on time blanking. If the
voltage on V
turn-on time, the SFST capacitor is discharged, which also
discharges the V
current on the next cycle and will reduce overall stress in
the primary switch.
ON(MIN)
C
C
node voltage, the primary side switch is turned off.
reaches its 2.56V clamp. At clamp, the primary side
resistor. If this produces more power than the
SENSE
C
SENSE
capacitor. This then reduces the peak
reaches 206mV after the minimum
to exceed the max 98mV rating
C
node voltage and
SENSE
level. This
3837fa