HCS157D INTERSIL [Intersil Corporation], HCS157D Datasheet

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HCS157D

Manufacturer Part Number
HCS157D
Description
Radiation Hardened Quad 2-Input Multiplexers
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
1.HCS157D.pdf (9 pages)
September 1995
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Features
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
• Dose Rate Survivability: >1 x 10
• Dose Rate Upset >10
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
• Input Current Levels Ii
Description
The Intersil HCS157MS is a Radiation Hardened quad 2-input
multiplexers which select four bits of data from two sources under
the control of a common select input (S). The Enable input (E
NOT) is active low. When the enable pin is high all of the outputs
(1Y-4Y) are forced low regardless of all other input conditions.
Moving data from two groups of registers to four common output
busses is a common use of these devices. The state of the Select
input determines the particular register from which the data comes.
They can also be used as function generators.
The HCS157MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of radia-
tion hardened, high-speed, CMOS/SOS Logic Family.
The HCS157MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
HCS157DMSR
HCS157KMSR
HCS157D/Sample
HCS157K/Sample
HCS157HMSR
(Typ)
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
PART NUMBER
10
RAD (Si)/s, 20ns Pulse
5 A at VOL, VOH
TEMPERATURE RANGE
12
o
C to +125
-55
-55
RAD (Si)/s
o
o
C to +125
C to +125
+25
+25
+25
o
o
o
o
C
C
C
-9
C
2
/mg
Errors/Bit-Day
o
o
C
C
173
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
SCREENING LEVEL
Pinouts
GND
HCS157MS
1I0
1I1
2I0
2I1
1Y
2Y
S
MIL-STD-1835 CDFP4-F16, LEAD FINISH C
MIL-STD-1835 CDIP2-T16, LEAD FINISH C
FLATPACK PACKAGE (FLATPACK)
16 LEAD CERAMIC DUAL-IN-LINE
16 LEAD CERAMIC METAL SEAL
METAL SEAL PACKAGE (SBDIP)
GND
Quad 2-Input Multiplexers
1I0
1I1
2I0
2I1
1Y
2Y
S
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
TOP VIEW
TOP VIEW
Radiation Hardened
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
Die
Spec Number
16
15
14
13
12
11
10
9
File Number
PACKAGE
16
15
14
13
12
11
10
9
VCC
E
4I0
4I1
4Y
3I0
3I1
3Y
518833
3561.1
VCC
E
4I0
4I1
4Y
3I0
3I1
3Y

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HCS157D Summary of contents

Page 1

... The HCS157MS is supplied lead Ceramic flatpack (K suffi SBDIP Package (D suffix). Ordering Information PART NUMBER TEMPERATURE RANGE HCS157DMSR HCS157KMSR HCS157D/Sample HCS157K/Sample HCS157HMSR CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 HCS157MS Pinouts ...

Page 2

Functional Block Diagram 4I1 14 4I0 10 3I1 11 3I0 6 2I1 5 2I0 3 1I1 2 1I0 ENABLE High Level L = Low Level X = ...

Page 3

Absolute Maximum Ratings Supply Voltage (VCC -0.5V to +7.0V Input Voltage Range, All Inputs . . ...

Page 4

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL Propagation Delay TPHL VCC = 4.5V Data to Output TPLH VCC = 4.5V Propagation Delay TPHL VCC = 4.5V Enable to Output TPLH VCC = 4.5V Propagation Delay TPHL VCC = 4.5V ...

Page 5

TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL Supply Current ICC Output Current (Sink) IOL Output Current IOH (Source) Output Voltage Low VOL Output Voltage High VOH Input Leakage Current IIN Noise Immunity FN Functional Test Propagation Delay ...

Page 6

CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test I (Postburn-In) Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Group B Subgroup B-5 Subgroup B-6 Group D NOTE: 1. Alternate Group A testing in ...

Page 7

Intersil Space Level Product Flow - ‘MS’ Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method ...

Page 8

Propagation Delay Timing Diagram and Load Circuit VIH INPUT VS VSS TPLH VOH VS OUTPUT VOL TEST DUT POINT CL RL All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by ...

Page 9

Die Characteristics DIE DIMENSIONS mils METALLIZATION: Type: SiAl Å Å Metal Thickness: 11k 1k GLASSIVATION: Type: SiO 2 Å Å Thickness: 13k 2.6k WORST CASE CURRENT DENSITY <2 A/cm BOND PAD SIZE: 100 ...

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