MC908GR16ACFA FREESCALE [Freescale Semiconductor, Inc], MC908GR16ACFA Datasheet - Page 226

• Manufacturer Part Number: MC908GR16ACFA
• Description: M68HC08 Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Timer Interface Module (TIM1 and TIM2)
18.9.2 TIM Counter Registers
The two read-only TIM counter registers contain the high and low bytes of the value in the TIM counter.
Reading the high byte (TCNTH) latches the contents of the low byte (TCNTL) into a buffer. Subsequent
reads of TCNTH do not affect the latched TCNTL value until TCNTL is read. Reset clears the TIM counter
registers. Setting the TIM reset bit (TRST) also clears the TIM counter registers.
18.9.3 TIM Counter Modulo Registers
The read/write TIM modulo registers contain the modulo value for the TIM counter. When the TIM counter
reaches the modulo value, the overflow flag (TOF) becomes set, and the TIM counter resumes counting
from $0000 at the next timer clock. Writing to the high byte (TMODH) inhibits the TOF bit and overflow
interrupts until the low byte (TMODL) is written. Reset sets the TIM counter modulo registers.
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Address: T1CNTH, $0021 and T2CNTH, $002C
Address: T1CNTL, $0022 and T2CNTL, $002D
If you read TCNTH during a break interrupt, be sure to unlatch TCNTL by
reading TCNTL before exiting the break interrupt. Otherwise, TCNTL
retains the value latched during the break.
Reset:
Reset:
Read:
Read:
Write:
Write:
Bit 15
Bit 7
Bit 7
Bit 7
0
0
PS2
Figure 18-6. TIM Counter Registers High (TCNTH)
Figure 18-7. TIM Counter Registers Low (TCNTL)
0
0
0
0
1
1
1
1
= Unimplemented
= Unimplemented
14
6
0
6
6
0
PS1
MC68HC908GR16A Data Sheet, Rev. 1.0
0
0
1
1
0
0
1
1
Table 18-2. Prescaler Selection
13
5
0
5
5
0
PS0
0
1
0
1
0
1
0
1
NOTE
Internal bus clock ÷ 1
Internal bus clock ÷ 2
Internal bus clock ÷ 4
Internal bus clock ÷ 8
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
Not available
12
4
0
4
4
0
TIM Clock Source
11
3
0
3
3
0
10
2
0
2
2
0
1
9
0
1
1
0
Freescale Semiconductor
Bit 0
Bit 8
Bit 0
Bit 0
0
0