M34282E2GP MITSUBISHI [Mitsubishi Electric Semiconductor], M34282E2GP Datasheet - Page 18

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M34282E2GP

Manufacturer Part Number
M34282E2GP
Description
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheets

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Table 6 Port state at reset
Fig. 20 Internal state at reset
Note: The contents of all output latch is initialized to “0.”
VOLTAGE DROP DETECTION CIRCUIT
The built-in voltage drop detection circuit is designed to detect a
drop in voltage at operating and to reset the microcomputer if
the supply voltage drops below the specified value (Typ. 1.50 V)
or less.
Fig. 21 Voltage drop detection circuit operation waveform
18
(1) Internal state at reset
D
D
G
E
CARR
Name
0
0
4
0
• Program counter (PC) ..............................................................
• Power down flag (P) .................................................................
• Timer 1 underflow flag (T1F) ...................................................
• Timer 2 underflow flag (T2F) ...................................................
• Timer control register V1 ..........................................................
• Timer control register V2 ..........................................................
• Port CARR output flag (CAR) ..................................................
• Pull-down control register PU0 ................................................
• Pull-down control register PU1 ................................................
• Logic operation selection register LO ......................................
• Most significant ROM code reference enable flag (URS)
• Carry flag (CY) .........................................................................
• Register A .................................................................................
• Register B .................................................................................
• Register X .................................................................................
• Register Y .................................................................................
• Stack pointer (SP) ....................................................................
–D
–D
, E
–G
Internal reset signal
Table 6 shows port state at reset, and Figure 20 shows internal
state at reset (they are retained after system is released from
reset).
Address 0 in page 0 is set to program counter.
1
3
7
3
Reset voltage
High impedance state
High impedance state (Pull-down transistor OFF)
High impedance state (Pull-down transistor OFF)
High impedance state (Pull-down transistor OFF)
“L” output
TYP 1.5V
VDD
State at reset
Note: The voltage drop detection circuit does not have
the hysteresis characteristics in the detected voltage.
MITSUBISHI
ELECTRIC
(Note)
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
1
The voltage drop detection circuit is stopped and power
dissipation is reduced in the RAM back-up mode with the
initialized CPU stopped.
The contents of timers, registers, flags and RAM except shown
in Figure 20 are undefined, so set the initial value to them.
0
0
0
0
0
0
1
1
0
0
1
0
0
0
0
0
1
1
0
0
0
0
0
1
1
0
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Microcomputer starts operation
after f(X
0
0
IN
) is counted to 16384 times.
MITSUBISHI MICROCOMPUTERS
0
0
0
0
0
4282 Group

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