M34282E2GP MITSUBISHI [Mitsubishi Electric Semiconductor], M34282E2GP Datasheet - Page 4

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M34282E2GP

Manufacturer Part Number
M34282E2GP
Description
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheets

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CONNECTIONS OF UNUSED PINS
Notes 1: Ports D
(Note in order to set the output latch to “1” to make pins open)
• After system is released from reset, a port is in a high-impedance state until the output latch of the port is set to “1” by software.
• To set the output latch periodically is recommended because the value of output latch may change by noise or a program run away
(Note when connecting to V
• Connect the unused pins to V
PORT FUNCTION
4
DEFINITION OF CLOCK AND CYCLE
• System clock (STCK)
D
E
E
G
Port D
Port E
Port G
Port CARR
When not using
When using
CCK instruction
2
Accordingly, the voltage level of pins is undefined and the excess of the supply current may occur.
(caused by noise).
0
0
0
The system clock is the source clock for controlling this product.
It can be selected as shown below whether to use the CCK
instruction.
, E
–D
–G
Port
1
7
3
2: Set the corresponding bits of the pull-down control register PU0 to “0” by software and turn the pull-down transistor OFF.
Pin
OFF.
D
D
E
E
E
G
CARR
4
0
1
2
0
4
0
–D
–D
–D
–G
Open or connect to V
Set the output latch to “1” and open, or
connect to V
Open or connect to V
Set the output latch to “1” and open, or
connect to V
7
Pin
3
7
3
: Set the bit 2 (PU0
System clock
f(X
f(X
IN
SS
IN
)/8
)
and V
Output
Output
Output
DD
DD
Input/
SS
Input
I/O
I/O
I/O
(4)
(4)
(2)
(1)
(4)
(1)
pin (Note 2).
pin (Note 2).
or V
Connection
DD
)
DD
P-channel open-drain
P-channel open-drain
P-channel open-drain
CMOS
DD
SS
2
) of the pull-down control register PU1 to “0” by software and turn the pull-down transistor
at the shortest distance and use the thick wire against noise.
Instruction clock
pin.
pin (Note 1).
Output structure
f(X
f(X
IN
IN
)/32
)/4
MITSUBISHI
ELECTRIC
Control
Output:
Input:
2 bits
3 bits
4 bits
1 bit
1 bit
bits
• Instruction clock (INSTCK)
• Machine cycle
The instruction clock is a signal derived by dividing the system
clock by 4, and is the basic clock for controlling CPU. The one
instruction clock cycle is equivalent to one machine cycle.
The machine cycle is the cycle required to execute the
instruction.
SD
RD
CLD
SD
RD
CLD
SZD
OEA
IAE
IAE
OGA
IAG
SCAR
RCAR
instructions
Control
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
PU1
PU0
PU0
registers
Control
MITSUBISHI MICROCOMPUTERS
Pull-down function and
key-on wakeup function
(programmable)
Pull-down function and
key-on wakeup function
(programmable)
Pull-down function and
key-on wakeup function
(programmable)
4282 Group
Remark

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