AK5702VN AKM [Asahi Kasei Microsystems], AK5702VN Datasheet - Page 44

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AK5702VN

Manufacturer Part Number
AK5702VN
Description
4-Channel ADC with PLL & MIC-AMP
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet

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3. Example of ALC Operation
Table 35 shows the examples of the ALC setting for mic recording.
The following registers should not be changed during the ALC operation. These bits should be changed after the ALC
operation is finished by ALC4 bit = ALCA/B bit = “0” or PMADA/BL=PMADA/BR bits = “0”.
MS0623-E-00
Register Name
LMTHA/B1-0
ZELMNA/B
ZTMA/B1-0
WTMA/B2-0
REFA/B7-0
IVA/BL7-0,
IVA/BR7-0
LMATA/B1-0
LFST
RGA/B1-0
RFSTA/B1_0
ALCA/B
WR (LMATA1-0, RGA1-0, ZELMNA, LMTHA1-0; ALCA= “1”)
• LMTHA/B1-0, LMATA/B1-0, WTMA/B2-0, ZTMA/B1-0, RGA/B1-0, REFA/B7-0, ZELMNA/B, LFST,
RFSTA/B1-0
WR (ZTMA1-0, WTMA2-0, RFSTA1-0)
Comment
Limiter detection Level
Zero crossing timeout period
Recovery waiting period
*WTMA/B 2-0 bits should be the same
Maximum gain at recovery operation
Gain of IVOL
Limiter ATT step
Fast Limiter Operation
Recovery GAIN step
Fast Recovery Speed
Limiter zero crossing detection
ALC enable
data as ZTMA/B 1-0 bits
WR (IVAL/R7-0)
Note : WR : Write
WR (REFA7-0)
ALC Operation
Manual Mode
WR (LFST)
Figure 43. Registers set-up sequence at ALCA operation
* The value of IVOL should be
Table 35. Example of the ALC setting
the same or smaller than REF’s
- 44 -
Data
E1H
91H
000
01
00
00
00
00
0
1
1
fs=8kHz
−4.1dBFS
Operation
Example:
4 times
Enable
Enable
+30dB
1 step
1 step
16ms
16ms
0dB
ON
Limiter = Zero crossing Enable
Recovery Cycle = 16ms@8kHz
Limiter and Recovery Step = 1
Maximum Gain = +30.0dB
Limiter Detection Level = −4.1dBFS
Fast Limiter Operation :ON
ALCA bit = “1”
(1) Addr=08H&09H, Data=91H
(3) Addr=0BH, Data=E1H
(2) Addr=0AH, Data=00H
(4) Addr=0DH, Data=02H
(5) Addr=0CH, Data=81H
Data
E1H
91H
011
01
11
00
00
00
0
1
1
fs=44.1kHz
−4.1dBFS
Operation
23.2ms
23.2ms
4 times
Enable
Enable
+30dB
1 step
1 step
0dB
ON
[AK5702]
2007/06

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