AK4319AVM AKM [Asahi Kasei Microsystems], AK4319AVM Datasheet - Page 12

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AK4319AVM

Manufacturer Part Number
AK4319AVM
Description
18Bit SCF DAC
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet

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Part Number:
AK4319AVM-E2
Manufacturer:
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ASAHI KASEI
The AK4319A are placed in the power-down mode by bringing PD pin "L" and the analog outputs are
floating(Hi-Z). Figure 7 shows an example of the system timing at the power-down and power-up.
The AK4319A should be reset once by bringing PD "L" upon power-up. The AK4319A is powered up and
the internal timing starts clocking by LRCK " " after exiting reset and power down state by XTI. The
AK4319A is in power-down mode until LRCK is input.
Some click noise may occur at the transition("
avoided by controlling the external mute circuit. The S/N of -110dB could be achieved by muting the
analog outputs using DZF signal.
M0011-E-01
Power-Down
System Reset
External mute circuit
1
2
3
4
5
Analog output has the group delay(GD).
When power-down is initiated, analog outputs are set into Hi-Z. Output noise level is about
-110dB.
Some -50dB of click noise occurs at the transition("
When the master clock is stopped, the AK4319A should have been in the power-down mode.
If the click noise(
needed. Please refer to Figure 7 .
3
)is a problem, an external mute circuit which generates above timing (
Figure 7 . Power-down/up sequence example
") of PD signal. The click noise of PD signal can be
- 12 -
") of PD pin.
5
[AK4319A]
)is
1998/6

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