AK4340_06 AKM [Asahi Kasei Microsystems], AK4340_06 Datasheet - Page 17

• Manufacturer Part Number: AK4340_06
• Description: 192kHz 24-Bit Stereo ?? DAC with 2Vrms Output
• Manufacturer: AKM [Asahi Kasei Microsystems]

ASAHI KASEI
Some function of the AK4340 can be controlled by pins (parallel control mode) shown in Table 11. The serial control
interface is enabled by the P/S pin = “L”. Internal registers may be written to 3-wire µP interface pins, CSN, CCLK and
CDTI. The data on this interface consists of Chip Address (2bits, C1/0; fixed to “01”), Read/Write (1bit; fixed to “1”,
Write only), Register Address (MSB first, 5bits) and Control Data (MSB first, 8bits). The AK4340 latches the data on the
rising edge of CCLK, so data should clocked in on the falling edge. The writing of data becomes valid by CSN “ ↑ ”. The
clock speed of CCLK is 5MHz (max).
PDN pin = “L” resets the registers to their default values. When the state of P/S pin is changed, the AK4340 should be
reset by PDN pin = “L”. The internal timing circuit is reset by RSTN bit, but the registers are not initialized.
*The AK4340 does not support the read command and chip address. C1/0 and R/W are fixed to “011”
*When the AK4340 is in the power down mode (PDN pin = “L”) or the MCLK is not provided, writing into the control
Notes:
MS0501-E-00
Addr
00H
01H
02H
03H
04H
register is inhibited.
Register Map
Mode Control Interface
For addresses from 05H to 1FH, data must not be written.
When PDN pin goes “L”, the registers are initialized to their default values.
When RSTN bit goes “0”, the only internal timing is reset and the registers are not initialized to their default
values. All data can be written to the register even if PW or RSTN bit is “0”.
Register Name
Control 1
Control 2
Control 3
Lch ATT
Rch ATT
CSN
CCLK
CDTI
Function
Double sampling mode at 128/192fs
De-emphasis
SMUTE
16/20/24bit LSB justified format
ACKS
ATT7
ATT7
C1
0
D7
0
0
Table 11. Function list (O: available, X: not available)
C0
1
R/W
2
C1-C0: Chip Address (Fixed to “01”)
R/W:
A4-A0: Register Address
D7-D0: Control Data
ATT6
ATT6
A4
D6
3
0
0
0
Figure 14. Control I/F Timing
A3
4
READ/WRITE (Fixed to “1”, Write only)
A2
5
ATT5
ATT5
D5
A1
0
0
0
6
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Parallel control mode
A0
7
D7
8
DFS1
INVL
ATT4
ATT4
DIF2
D4
D6
9
X
X
O
X
D5
10 11 12 13 14 15
D4
INVR
ATT3
ATT3
DFS0
DIF1
D3
D3
Serial control mode
D2
D1
DEM1
ATT2
ATT2
DIF0
D2
0
O
O
O
O
D0
DEM0
ATT1
ATT1
PW
D1
0
[AK4340]
SMUTE
2006/04
RSTN
ATT0
ATT0
D0
0