AK4385ET AKM [Asahi Kasei Microsystems], AK4385ET Datasheet - Page 14

• Manufacturer Part Number: AK4385ET
• Description: 108dB 192kHz 24-Bit 2ch ?? DAC
• Manufacturer: AKM [Asahi Kasei Microsystems]

ASAHI KASEI
The AK4385 should be reset once by bringing PDN= ”L” upon power-up. The AK4385 is powered up and the internal
timing starts clocking by LRCK “↑” after exiting reset and power down state by MCLK. The AK4385 is in the
power-down mode until MCLK and LRCK are input.
The AK4385 is placed in the power-down mode by bringing PDN pin “L” and the anlog outputs are floating (Hi-Z).
Figure 6 shows an example of the system timing at the power-down and power-up.
Notes:
MS0246-E-01
System Reset
Power-down
(1) The analog output corresponding to digital input has the group delay (GD).
(2) Analog outputs are floating (Hi -Z) at the power-down mode.
(3) Click noise occurs at the edge of PDN signal. This noise is output even if “0” data is input.
(4) The external clocks (MCLK, BICK and LRCK) can be stopped in the power-down mode (PDN = “L”).
(5) Please mute the analog output externally if the click noise (3) influences system application.
(6) DZF pins are “L” in the power-down mode (PDN = “L”).
Internal
D/A In
D/A Out
Clock In
MCLK, LRCK, BICK
PDN
DZFL/DZFR
External
MUTE
(Digital)
(Analog)
The timing example is shown in this figure.
State
(5)
Normal Operation
Figure 6. Power-down/up Sequence Example
GD
(1)
(3)
(6)
- 14 -
(4)
Mute ON
Power-down
“0” data
Don’t care
(2)
(3)
Normal Operation
GD
(1)
[AK4385]
2006/01